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arm64: dts: apple: Add A11 devices

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Add DTS files for the A11 SoC and the following devices based on it:

- iPhone 8
- iPhone 8 Plus
- iPhone X

On A11, Apple has introduced independent performance and efficiency core
clusters, so indicate it in the device tree as well.

Signed-off-by: Konrad Dybcio <konradybcio@kernel.org>
[Nick: SMP and m1n1 support, disabled SMC pinctrl]
Co-developed-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Konrad Dybcio 2024-10-23 12:40:54 +08:00 committed by Hector Martin
parent a9a28afb83
commit d23457abac
12 changed files with 407 additions and 0 deletions
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6
arch/arm64/boot/dts/apple/Makefile
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@ -46,6 +46,12 @@ dtb-$(CONFIG_ARCH_APPLE) += t8011-j120.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j121.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j207.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8011-j208.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d201.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d20.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d211.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d21.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d221.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8015-d22.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb

13
arch/arm64/boot/dts/apple/t8015-8.dtsi Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "t8015.dtsi"
#include "t8015-common.dtsi"
/ {
chassis-type = "handset";
};

9
arch/arm64/boot/dts/apple/t8015-8plus.dtsi Normal file
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@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 Plus common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/* The 8 Plus has minor differences like 1 more camera, 1 GiB of RAM more and a bigger display. */
#include "t8015-8.dtsi"

48
arch/arm64/boot/dts/apple/t8015-common.dtsi Normal file
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@ -0,0 +1,48 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8, iPhone 8 Plus, iPhone X
*
* This file contains parts common to all Apple A11 devices.
*
* target-type: D20, D21, D22, D201, D211, D221
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
/ {
aliases {
serial0 = &serial0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0 0>; /* To be filled by loader */
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* To be filled by loader */
};
};
&serial0 {
status = "okay";
};

14
arch/arm64/boot/dts/apple/t8015-d20.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 (Global), D20 iPhone10,1 (A1863/A1906/A1907)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-8.dtsi"
/ {
compatible = "apple,d20", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone 8 (Global)";
};

14
arch/arm64/boot/dts/apple/t8015-d201.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 (GSM), D20 iPhone10,4 (A1905)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-8.dtsi"
/ {
compatible = "apple,d201", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone 8 (GSM)";
};

14
arch/arm64/boot/dts/apple/t8015-d21.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 Plus (Global), D21 iPhone10,2 (A1864/A1897/A1898)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-8plus.dtsi"
/ {
compatible = "apple,d21", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone 8 Plus (Global)";
};

14
arch/arm64/boot/dts/apple/t8015-d211.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone 8 Plus (GSM), D211 iPhone10,5 (A1899)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-8plus.dtsi"
/ {
compatible = "apple,d211", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone 8 Plus (GSM)";
};

14
arch/arm64/boot/dts/apple/t8015-d22.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone X (Global), D22, iPhone10,3 (A1865)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-x.dtsi"
/ {
compatible = "apple,d22", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone X (Global)";
};

14
arch/arm64/boot/dts/apple/t8015-d221.dts Normal file
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@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone X (GSM), D221, iPhone10,6 (A1901)
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
/dts-v1/;
#include "t8015-x.dtsi"
/ {
compatible = "apple,d221", "apple,t8015", "apple,arm-platform";
model = "Apple iPhone X (GSM)";
};

13
arch/arm64/boot/dts/apple/t8015-x.dtsi Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iPhone X common device tree
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include "t8015.dtsi"
#include "t8015-common.dtsi"
/ {
chassis-type = "handset";
};

234
arch/arm64/boot/dts/apple/t8015.dtsi Normal file
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@ -0,0 +1,234 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T8015 "A11" SoC
*
* Other names: H10, "Skye"
*
* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu_e0>;
};
core1 {
cpu = <&cpu_e1>;
};
core2 {
cpu = <&cpu_e2>;
};
core3 {
cpu = <&cpu_e3>;
};
};
cluster1 {
core0 {
cpu = <&cpu_p0>;
};
core1 {
cpu = <&cpu_p1>;
};
};
};
cpu_e0: cpu@0 {
compatible = "apple,mistral";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
cpu_e1: cpu@1 {
compatible = "apple,mistral";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
cpu_e2: cpu@2 {
compatible = "apple,mistral";
reg = <0x0 0x2>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
cpu_e3: cpu@3 {
compatible = "apple,mistral";
reg = <0x0 0x3>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
cpu_p0: cpu@10004 {
compatible = "apple,monsoon";
reg = <0x0 0x10004>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
cpu_p1: cpu@10005 {
compatible = "apple,monsoon";
reg = <0x0 0x10005>;
cpu-release-addr = <0 0>; /* To be filled by loader */
enable-method = "spin-table";
device_type = "cpu";
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
serial0: serial@22e600000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x2e600000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 282 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
status = "disabled";
};
aic: interrupt-controller@232100000 {
compatible = "apple,t8015-aic", "apple,aic";
reg = <0x2 0x32100000 0x0 0x8000>;
#interrupt-cells = <3>;
interrupt-controller;
};
pinctrl_ap: pinctrl@233100000 {
compatible = "apple,t8015-pinctrl", "apple,pinctrl";
reg = <0x2 0x33100000 0x0 0x1000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_ap 0 0 223>;
apple,npins = <223>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 50 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 51 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 52 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 53 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 54 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 55 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 56 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_aop: pinctrl@2340f0000 {
compatible = "apple,t8015-pinctrl", "apple,pinctrl";
reg = <0x2 0x340f0000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 49>;
apple,npins = <49>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 135 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 136 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 137 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 138 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 139 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 140 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 141 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_nub: pinctrl@2351f0000 {
compatible = "apple,t8015-pinctrl", "apple,pinctrl";
reg = <0x2 0x351f0000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_nub 0 0 8>;
apple,npins = <8>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 168 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 169 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 170 IRQ_TYPE_LEVEL_HIGH>;
};
wdt: watchdog@2352b0000 {
compatible = "apple,t8015-wdt", "apple,wdt";
reg = <0x2 0x352b0000 0x0 0x4000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 172 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_smc: pinctrl@236024000 {
compatible = "apple,t8015-pinctrl", "apple,pinctrl";
reg = <0x2 0x36024000 0x0 0x4000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_smc 0 0 6>;
apple,npins = <6>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 199 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 200 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 201 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 202 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 203 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 204 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 205 IRQ_TYPE_LEVEL_HIGH>;
/*
* SMC is not yet supported and accessing this pinctrl while SMC is
* suspended results in a hang.
*/
status = "disabled";
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A11 doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};