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arm64: dts: imx8mp-evk: Enable pull select bit for PCIe regulator GPIO (M.2 W_DISABLE1)
The current pin configuration for MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06
sets the weak pull-up but does not enable the pull select field.
Bit 8 in the IOMUX register must be set in order for the weak pull-up
to actually take effect.
Update the pinctrl setting from 0x40 to 0x140 to enable both the pull
select and the weak pull-up, ensuring the line behaves as expected.
Fixes: d506505000 ("arm64: dts: imx8mp-evk: Add PCIe support")
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
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parent
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@ -1068,7 +1068,7 @@ MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40
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pinctrl_pcie0_reg: pcie0reggrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x40
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MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06 0x140
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>;
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};
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