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drm/i915/dp: Restructure the sink/output format selection

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Restructure intel_dp_compute_output_format() to resemble the new
intel_hdmi_compute_output_formats().

Again, we basically have two main code paths:
- YCbCr 4:2:0 only modes
- everything else including YCbCr 4:2:0 also modes

Take the exact same approach with the DP code, making the
format selection much less convoluted.

Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260409101539.22032-5-ville.syrjala@linux.intel.com
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
This commit is contained in:
Ville Syrjälä 2026-04-09 13:15:34 +03:00
parent a68d3d7fd9
commit d1c9059918
1 changed files with 66 additions and 26 deletions
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92
drivers/gpu/drm/i915/display/intel_dp.c
View File

@ -1379,6 +1379,28 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
return MODE_OK;
}
static enum drm_mode_status
intel_dp_sink_format_valid(struct intel_connector *connector,
const struct drm_display_mode *mode,
enum intel_output_format sink_format)
{
const struct drm_display_info *info = &connector->base.display_info;
switch (sink_format) {
case INTEL_OUTPUT_FORMAT_YCBCR420:
if (!connector->base.ycbcr_420_allowed ||
!drm_mode_is_420(info, mode))
return MODE_NO_420;
return MODE_OK;
case INTEL_OUTPUT_FORMAT_RGB:
return MODE_OK;
default:
MISSING_CASE(sink_format);
return MODE_BAD;
}
}
int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
{
return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@ -3338,41 +3360,59 @@ static int
intel_dp_compute_output_format(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state,
bool respect_downstream_limits)
bool respect_downstream_limits,
enum intel_output_format sink_format)
{
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_connector *connector = intel_dp->attached_connector;
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
if (intel_dp_sink_format_valid(connector, adjusted_mode,
sink_format) != MODE_OK)
return -EINVAL;
crtc_state->sink_format = sink_format;
crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
return intel_dp_compute_link_config(encoder, crtc_state, conn_state,
respect_downstream_limits);
}
static int
intel_dp_compute_formats(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state,
bool respect_downstream_limits)
{
struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct intel_connector *connector = intel_dp->attached_connector;
const struct drm_display_info *info = &connector->base.display_info;
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
bool ycbcr_420_only;
int ret;
ycbcr_420_only = drm_mode_is_420_only(info, adjusted_mode);
if (drm_mode_is_420_only(info, adjusted_mode)) {
ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_YCBCR420);
if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) {
drm_dbg_kms(display->drm,
"YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
crtc_state->sink_format = INTEL_OUTPUT_FORMAT_RGB;
if (ret) {
drm_dbg_kms(display->drm,
"YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back to RGB.\n");
ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_RGB);
}
} else {
crtc_state->sink_format = intel_dp_sink_format(connector, adjusted_mode);
}
ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_RGB);
crtc_state->output_format = intel_dp_output_format(connector, crtc_state->sink_format);
ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
respect_downstream_limits);
if (ret) {
if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
!connector->base.ycbcr_420_allowed ||
!drm_mode_is_420_also(info, adjusted_mode))
return ret;
crtc_state->sink_format = INTEL_OUTPUT_FORMAT_YCBCR420;
crtc_state->output_format = intel_dp_output_format(connector,
crtc_state->sink_format);
ret = intel_dp_compute_link_config(encoder, crtc_state, conn_state,
respect_downstream_limits);
if (ret && drm_mode_is_420_also(info, adjusted_mode))
ret = intel_dp_compute_output_format(encoder, crtc_state, conn_state,
respect_downstream_limits,
INTEL_OUTPUT_FORMAT_YCBCR420);
}
return ret;
@ -3547,9 +3587,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
* Try to respect downstream TMDS clock limits first, if
* that fails assume the user might know something we don't.
*/
ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, true);
ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, true);
if (ret)
ret = intel_dp_compute_output_format(encoder, pipe_config, conn_state, false);
ret = intel_dp_compute_formats(encoder, pipe_config, conn_state, false);
if (ret)
return ret;