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drm/amdgpu: add the sensor value of VCN activity
This will add the sensor value of VCN activity for some ASICs. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -150,6 +150,7 @@ enum amd_pp_sensors {
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AMDGPU_PP_SENSOR_VCN_POWER_STATE,
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AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,
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AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,
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AMDGPU_PP_SENSOR_VCN_LOAD,
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};
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enum amd_pp_task {
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@ -1581,6 +1581,30 @@ static ssize_t amdgpu_get_mem_busy_percent(struct device *dev,
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return sysfs_emit(buf, "%d\n", value);
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}
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/**
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* DOC: vcn_busy_percent
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*
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* The amdgpu driver provides a sysfs API for reading how busy the VCN
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* is as a percentage. The file vcn_busy_percent is used for this.
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* The SMU firmware computes a percentage of load based on the
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* aggregate activity level in the IP cores.
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*/
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static ssize_t amdgpu_get_vcn_busy_percent(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct drm_device *ddev = dev_get_drvdata(dev);
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struct amdgpu_device *adev = drm_to_adev(ddev);
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unsigned int value;
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int r;
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r = amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VCN_LOAD, &value);
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if (r)
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return r;
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return sysfs_emit(buf, "%d\n", value);
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}
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/**
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* DOC: pcie_bw
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*
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@ -2180,6 +2204,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
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.attr_update = pp_od_clk_voltage_attr_update),
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AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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AMDGPU_DEVICE_ATTR_RO(mem_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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AMDGPU_DEVICE_ATTR_RO(vcn_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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AMDGPU_DEVICE_ATTR_RO(pcie_bw, ATTR_FLAG_BASIC),
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AMDGPU_DEVICE_ATTR_RW(pp_features, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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AMDGPU_DEVICE_ATTR_RO(unique_id, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
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@ -2223,6 +2248,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
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gc_ver != IP_VERSION(9, 4, 3)) ||
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gc_ver == IP_VERSION(9, 0, 1))
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*states = ATTR_STATE_UNSUPPORTED;
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} else if (DEVICE_ATTR_IS(vcn_busy_percent)) {
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if (!(gc_ver == IP_VERSION(10, 3, 1) ||
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gc_ver == IP_VERSION(10, 3, 3) ||
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gc_ver == IP_VERSION(10, 3, 6) ||
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gc_ver == IP_VERSION(10, 3, 7) ||
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gc_ver == IP_VERSION(11, 0, 1) ||
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gc_ver == IP_VERSION(11, 0, 4) ||
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gc_ver == IP_VERSION(11, 5, 0)))
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*states = ATTR_STATE_UNSUPPORTED;
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} else if (DEVICE_ATTR_IS(pcie_bw)) {
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/* PCIe Perf counters won't work on APU nodes */
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if (adev->flags & AMD_IS_APU ||
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@ -4429,6 +4463,9 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a
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/* MEM Load */
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if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size))
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seq_printf(m, "MEM Load: %u %%\n", value);
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/* VCN Load */
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if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_LOAD, (void *)&value, &size))
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seq_printf(m, "VCN Load: %u %%\n", value);
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seq_printf(m, "\n");
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