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net: airoha: fix MIB stats collection to be lossless
REG_FE_GDM_MIB_CLEAR after every read creates a race window where
packets arriving between read and clear are lost from statistics.
Switch to a delta-based approach instead:
- 64-bit H+L registers (ok pkts/bytes, E64..L1023): read absolute
hardware total directly into a local variable; clamp with max(new, old)
to prevent torn-read regression when the counter carries between the
two reads.
- 32-bit registers (drops, bc, mc, errors, runt, long): accumulate
(u32)(curr - prev) into a 64-bit software counter; unsigned
subtraction handles wrap-around transparently.
- tx/rx_len[0] ([0,64] bucket): combines RUNT_CNT (32-bit, delta via
tx_runt/rx_runt) and E64_CNT (64-bit, absolute) into a single local
accumulator; max(new, old) applied here too to guard against a torn
read of E64 when the RUNT accumulator is unchanged between polls.
MIB counters are zeroed by the SCU FE reset (EN7581_FE_RST) asserted
in airoha_hw_init() at module load, so no explicit MIB clear is needed
in airoha_fe_init().
Merge airoha_dev_get_hw_stats() into airoha_update_hw_stats() and
move stats_lock inside. Plain spin_lock() is correct: the function
is only called from ndo_get_stats64() in process context. Each dev
refreshes only its own MIB counters; sibling devs on a shared GDM3/4
port are polled when their own netdev is queried.
Fixes: 8f4695fb67 ("net: airoha: better handle MIBs for GDM ports with multiple devs attached")
Signed-off-by: Aniket Negi <aniket.negi03@gmail.com>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260707152639.105628-1-aniket.negi03@gmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Aniket Negi
Paolo Abeni
parent
be7cc4656e
commit
d163725af8
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@ -1686,11 +1686,14 @@ static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)
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}
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}
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static void airoha_dev_get_hw_stats(struct airoha_gdm_dev *dev)
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static void airoha_update_hw_stats(struct airoha_gdm_dev *dev)
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{
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struct airoha_gdm_port *port = dev->port;
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struct airoha_eth *eth = dev->eth;
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u32 val, i = 0;
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u64 data;
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spin_lock(&port->stats_lock);
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/* Read relevant MIB for GDM with multiple port attached */
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if (port->id == AIROHA_GDM3_IDX || port->id == AIROHA_GDM4_IDX)
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@ -1701,152 +1704,188 @@ static void airoha_dev_get_hw_stats(struct airoha_gdm_dev *dev)
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u64_stats_update_begin(&dev->stats.syncp);
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/* TX */
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/* TX - 64-bit H+L registers: hw accumulates the total, read directly.
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* Use local variable to prevent readers from seeing intermediate values.
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* Clamp to prevent regression from torn reads between H and L.
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*/
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_H(port->id));
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dev->stats.tx_ok_pkts += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_L(port->id));
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dev->stats.tx_ok_pkts += val;
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data += val;
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dev->stats.tx_ok_pkts = max(data, dev->stats.tx_ok_pkts);
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_H(port->id));
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dev->stats.tx_ok_bytes += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_L(port->id));
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dev->stats.tx_ok_bytes += val;
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data += val;
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dev->stats.tx_ok_bytes = max(data, dev->stats.tx_ok_bytes);
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/* TX - 32-bit registers: accumulate delta to handle wrap-around. */
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_DROP_CNT(port->id));
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dev->stats.tx_drops += val;
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dev->stats.tx_drops += (u32)(val - dev->stats.mib_prev.tx_drops);
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dev->stats.mib_prev.tx_drops = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_BC_CNT(port->id));
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dev->stats.tx_broadcast += val;
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dev->stats.tx_broadcast += (u32)(val - dev->stats.mib_prev.tx_broadcast);
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dev->stats.mib_prev.tx_broadcast = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_MC_CNT(port->id));
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dev->stats.tx_multicast += val;
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dev->stats.tx_multicast += (u32)(val - dev->stats.mib_prev.tx_multicast);
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dev->stats.mib_prev.tx_multicast = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_RUNT_CNT(port->id));
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dev->stats.tx_len[i] += val;
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dev->stats.mib_prev.tx_runt64 +=
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(u32)(val - dev->stats.mib_prev.tx_runt);
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dev->stats.mib_prev.tx_runt = val;
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/* tx_len[0]: RUNT (32-bit, delta) + E64 (64-bit, absolute). */
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data = dev->stats.mib_prev.tx_runt64;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data += (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_H(port->id));
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dev->stats.tx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_L(port->id));
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dev->stats.tx_len[i++] += val;
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data += val;
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dev->stats.tx_len[i] = max(data, dev->stats.tx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_LONG_CNT(port->id));
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dev->stats.tx_len[i++] += val;
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dev->stats.tx_len[i++] += (u32)(val - dev->stats.mib_prev.tx_long);
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dev->stats.mib_prev.tx_long = val;
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/* RX */
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_H(port->id));
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dev->stats.rx_ok_pkts += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_L(port->id));
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dev->stats.rx_ok_pkts += val;
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data += val;
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dev->stats.rx_ok_pkts = max(data, dev->stats.rx_ok_pkts);
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_H(port->id));
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dev->stats.rx_ok_bytes += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_L(port->id));
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dev->stats.rx_ok_bytes += val;
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data += val;
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dev->stats.rx_ok_bytes = max(data, dev->stats.rx_ok_bytes);
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_DROP_CNT(port->id));
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dev->stats.rx_drops += val;
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dev->stats.rx_drops += (u32)(val - dev->stats.mib_prev.rx_drops);
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dev->stats.mib_prev.rx_drops = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_BC_CNT(port->id));
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dev->stats.rx_broadcast += val;
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dev->stats.rx_broadcast += (u32)(val - dev->stats.mib_prev.rx_broadcast);
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dev->stats.mib_prev.rx_broadcast = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_MC_CNT(port->id));
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dev->stats.rx_multicast += val;
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dev->stats.rx_multicast += (u32)(val - dev->stats.mib_prev.rx_multicast);
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dev->stats.mib_prev.rx_multicast = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ERROR_DROP_CNT(port->id));
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dev->stats.rx_errors += val;
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dev->stats.rx_errors += (u32)(val - dev->stats.mib_prev.rx_errors);
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dev->stats.mib_prev.rx_errors = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_CRC_ERR_CNT(port->id));
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dev->stats.rx_crc_error += val;
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dev->stats.rx_crc_error += (u32)(val - dev->stats.mib_prev.rx_crc_error);
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dev->stats.mib_prev.rx_crc_error = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_OVERFLOW_DROP_CNT(port->id));
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dev->stats.rx_over_errors += val;
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dev->stats.rx_over_errors += (u32)(val - dev->stats.mib_prev.rx_over_errors);
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dev->stats.mib_prev.rx_over_errors = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_FRAG_CNT(port->id));
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dev->stats.rx_fragment += val;
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dev->stats.rx_fragment += (u32)(val - dev->stats.mib_prev.rx_fragment);
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dev->stats.mib_prev.rx_fragment = val;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_JABBER_CNT(port->id));
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dev->stats.rx_jabber += val;
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dev->stats.rx_jabber += (u32)(val - dev->stats.mib_prev.rx_jabber);
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dev->stats.mib_prev.rx_jabber = val;
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i = 0;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_RUNT_CNT(port->id));
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dev->stats.rx_len[i] += val;
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dev->stats.mib_prev.rx_runt64 +=
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(u32)(val - dev->stats.mib_prev.rx_runt);
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dev->stats.mib_prev.rx_runt = val;
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/* rx_len[0]: RUNT (32-bit, delta) + E64 (64-bit, absolute). */
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data = dev->stats.mib_prev.rx_runt64;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data += (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_H(port->id));
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dev->stats.rx_len[i] += ((u64)val << 32);
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data = (u64)val << 32;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_L(port->id));
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dev->stats.rx_len[i++] += val;
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data += val;
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dev->stats.rx_len[i] = max(data, dev->stats.rx_len[i]);
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i++;
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val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_LONG_CNT(port->id));
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dev->stats.rx_len[i++] += val;
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dev->stats.rx_len[i] += (u32)(val - dev->stats.mib_prev.rx_long);
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dev->stats.mib_prev.rx_long = val;
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u64_stats_update_end(&dev->stats.syncp);
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}
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static void airoha_update_hw_stats(struct airoha_gdm_dev *dev)
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{
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struct airoha_gdm_port *port = dev->port;
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int i;
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spin_lock(&port->stats_lock);
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for (i = 0; i < ARRAY_SIZE(port->devs); i++) {
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if (port->devs[i])
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airoha_dev_get_hw_stats(port->devs[i]);
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}
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/* Reset MIB counters */
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airoha_fe_set(dev->eth, REG_FE_GDM_MIB_CLEAR(port->id),
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FE_GDM_MIB_RX_CLEAR_MASK | FE_GDM_MIB_TX_CLEAR_MASK);
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spin_unlock(&port->stats_lock);
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}
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@ -245,6 +245,33 @@ struct airoha_hw_stats {
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u64 rx_fragment;
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u64 rx_jabber;
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u64 rx_len[7];
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struct {
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/* Previous HW register values for 32-bit counter delta
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* tracking. Storing the last seen value and accumulating
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* (u32)(curr - prev) into the 64-bit software counter
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* handles wrap-around transparently via unsigned arithmetic.
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* tx_runt64/rx_runt64 hold the running sum of runt deltas.
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* These fields are never reported to userspace.
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*/
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u32 tx_drops;
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u32 tx_broadcast;
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u32 tx_multicast;
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u32 tx_runt;
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u32 tx_long;
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u64 tx_runt64;
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u32 rx_drops;
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u32 rx_broadcast;
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u32 rx_multicast;
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u32 rx_errors;
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u32 rx_crc_error;
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u32 rx_over_errors;
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u32 rx_fragment;
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u32 rx_jabber;
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u32 rx_runt;
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u32 rx_long;
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u64 rx_runt64;
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} mib_prev;
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};
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enum {
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