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drm/amdgpu/discovery: support new discovery binary header
Support for new IP discovery binary header version 2. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
c24afed7de
commit
d0c647a6aa
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@ -431,14 +431,12 @@ static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev)
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}
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static int amdgpu_discovery_verify_npsinfo(struct amdgpu_device *adev,
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struct binary_header *bhdr)
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struct table_info *info)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct table_info *info;
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uint16_t checksum;
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uint16_t offset;
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info = &bhdr->table_list[NPS_INFO];
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -491,6 +489,30 @@ static const char *amdgpu_discovery_get_fw_name(struct amdgpu_device *adev)
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}
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}
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static int amdgpu_discovery_get_table_info(struct amdgpu_device *adev,
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struct table_info **info,
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uint16_t table_id)
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{
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struct binary_header *bhdr =
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(struct binary_header *)adev->discovery.bin;
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struct binary_header_v2 *bhdrv2;
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switch (bhdr->version_major) {
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case 2:
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bhdrv2 = (struct binary_header_v2 *)adev->discovery.bin;
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*info = &bhdrv2->table_list[table_id];
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break;
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case 1:
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*info = &bhdr->table_list[table_id];
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break;
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default:
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dev_err(adev->dev, "Invalid ip discovery table version\n");
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return -EINVAL;
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}
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return 0;
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}
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static int amdgpu_discovery_init(struct amdgpu_device *adev)
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{
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struct table_info *info;
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@ -547,7 +569,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
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goto out;
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}
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info = &bhdr->table_list[IP_DISCOVERY];
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r = amdgpu_discovery_get_table_info(adev, &info, IP_DISCOVERY);
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if (r)
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goto out;
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -569,7 +593,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
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}
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}
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info = &bhdr->table_list[GC];
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r = amdgpu_discovery_get_table_info(adev, &info, GC);
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if (r)
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goto out;
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -592,7 +618,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
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}
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}
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info = &bhdr->table_list[HARVEST_INFO];
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r = amdgpu_discovery_get_table_info(adev, &info, HARVEST_INFO);
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if (r)
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goto out;
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -615,7 +643,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
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}
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}
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info = &bhdr->table_list[VCN_INFO];
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r = amdgpu_discovery_get_table_info(adev, &info, VCN_INFO);
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if (r)
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goto out;
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -638,7 +668,9 @@ static int amdgpu_discovery_init(struct amdgpu_device *adev)
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}
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}
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info = &bhdr->table_list[MALL_INFO];
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r = amdgpu_discovery_get_table_info(adev, &info, MALL_INFO);
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if (r)
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goto out;
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offset = le16_to_cpu(info->offset);
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checksum = le16_to_cpu(info->checksum);
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@ -770,14 +802,15 @@ static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev,
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uint32_t *umc_harvest_count)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct binary_header *bhdr;
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struct table_info *info;
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struct harvest_table *harvest_info;
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u16 offset;
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int i;
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uint32_t umc_harvest_config = 0;
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[HARVEST_INFO].offset);
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if (amdgpu_discovery_get_table_info(adev, &info, HARVEST_INFO))
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return;
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offset = le16_to_cpu(info->offset);
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if (!offset) {
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dev_err(adev->dev, "invalid harvest table offset\n");
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@ -1224,7 +1257,7 @@ static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev)
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{
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struct ip_discovery_top *ip_top = adev->discovery.ip_top;
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uint8_t *discovery_bin = adev->discovery.bin;
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struct binary_header *bhdr;
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struct table_info *info;
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struct ip_discovery_header *ihdr;
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struct die_header *dhdr;
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struct kset *die_kset = &ip_top->die_kset;
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@ -1232,10 +1265,12 @@ static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev)
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size_t ip_offset;
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int ii, res;
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bhdr = (struct binary_header *)discovery_bin;
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res = amdgpu_discovery_get_table_info(adev, &info, IP_DISCOVERY);
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if (res)
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return res;
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ihdr = (struct ip_discovery_header
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*)(discovery_bin +
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le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
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le16_to_cpu(info->offset));
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num_dies = le16_to_cpu(ihdr->num_dies);
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DRM_DEBUG("number of dies: %d\n", num_dies);
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@ -1426,7 +1461,7 @@ void amdgpu_discovery_dump(struct amdgpu_device *adev, struct drm_printer *p)
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static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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{
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uint8_t num_base_address, subrev, variant;
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struct binary_header *bhdr;
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struct table_info *info;
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struct ip_discovery_header *ihdr;
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struct die_header *dhdr;
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uint8_t *discovery_bin;
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@ -1451,10 +1486,12 @@ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
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adev->sdma.sdma_mask = 0;
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adev->vcn.inst_mask = 0;
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adev->jpeg.inst_mask = 0;
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bhdr = (struct binary_header *)discovery_bin;
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r = amdgpu_discovery_get_table_info(adev, &info, IP_DISCOVERY);
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if (r)
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return r;
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ihdr = (struct ip_discovery_header
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*)(discovery_bin +
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le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
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le16_to_cpu(info->offset));
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num_dies = le16_to_cpu(ihdr->num_dies);
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DRM_DEBUG("number of dies: %d\n", num_dies);
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@ -1627,14 +1664,15 @@ static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct ip_discovery_header *ihdr;
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struct binary_header *bhdr;
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struct table_info *info;
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int vcn_harvest_count = 0;
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int umc_harvest_count = 0;
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uint16_t offset, ihdr_ver;
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uint16_t ihdr_ver;
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset);
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ihdr = (struct ip_discovery_header *)(discovery_bin + offset);
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if (amdgpu_discovery_get_table_info(adev, &info, IP_DISCOVERY))
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return;
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ihdr = (struct ip_discovery_header *)(discovery_bin +
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le16_to_cpu(info->offset));
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ihdr_ver = le16_to_cpu(ihdr->version);
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/*
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* Harvest table does not fit Navi1x and legacy GPUs,
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@ -1682,7 +1720,7 @@ union gc_info {
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static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct binary_header *bhdr;
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struct table_info *info;
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union gc_info *gc_info;
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u16 offset;
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@ -1691,8 +1729,9 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev)
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return -EINVAL;
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}
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[GC].offset);
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if (amdgpu_discovery_get_table_info(adev, &info, GC))
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return -EINVAL;
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offset = le16_to_cpu(info->offset);
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if (!offset)
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return 0;
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@ -1791,7 +1830,7 @@ union mall_info {
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static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct binary_header *bhdr;
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struct table_info *info;
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union mall_info *mall_info;
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u32 u, mall_size_per_umc, m_s_present, half_use;
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u64 mall_size;
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@ -1802,8 +1841,9 @@ static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev)
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return -EINVAL;
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}
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[MALL_INFO].offset);
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if (amdgpu_discovery_get_table_info(adev, &info, MALL_INFO))
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return -EINVAL;
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offset = le16_to_cpu(info->offset);
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if (!offset)
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return 0;
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@ -1848,7 +1888,7 @@ union vcn_info {
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static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev)
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct binary_header *bhdr;
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struct table_info *info;
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union vcn_info *vcn_info;
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u16 offset;
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int v;
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@ -1868,8 +1908,9 @@ static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev)
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return -EINVAL;
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}
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[VCN_INFO].offset);
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if (amdgpu_discovery_get_table_info(adev, &info, VCN_INFO))
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return -EINVAL;
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offset = le16_to_cpu(info->offset);
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if (!offset)
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return 0;
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@ -1906,14 +1947,26 @@ static int amdgpu_discovery_refresh_nps_info(struct amdgpu_device *adev,
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uint64_t vram_size, pos, offset;
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struct nps_info_header *nhdr;
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struct binary_header bhdr;
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struct binary_header_v2 bhdrv2;
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uint16_t checksum;
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vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
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pos = vram_size - DISCOVERY_TMR_OFFSET;
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amdgpu_device_vram_access(adev, pos, &bhdr, sizeof(bhdr), false);
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offset = le16_to_cpu(bhdr.table_list[NPS_INFO].offset);
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checksum = le16_to_cpu(bhdr.table_list[NPS_INFO].checksum);
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switch (bhdr.version_major) {
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case 2:
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amdgpu_device_vram_access(adev, pos, &bhdrv2, sizeof(bhdrv2), false);
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offset = le16_to_cpu(bhdrv2.table_list[NPS_INFO].offset);
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checksum = le16_to_cpu(bhdrv2.table_list[NPS_INFO].checksum);
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break;
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case 1:
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offset = le16_to_cpu(bhdr.table_list[NPS_INFO].offset);
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checksum = le16_to_cpu(bhdr.table_list[NPS_INFO].checksum);
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break;
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default:
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return -EINVAL;
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}
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amdgpu_device_vram_access(adev, (pos + offset), nps_data,
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sizeof(*nps_data), false);
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@ -1936,7 +1989,7 @@ int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev,
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{
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uint8_t *discovery_bin = adev->discovery.bin;
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struct amdgpu_gmc_memrange *mem_ranges;
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struct binary_header *bhdr;
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struct table_info *info;
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union nps_info *nps_info;
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union nps_info nps_data;
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u16 offset;
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@ -1957,14 +2010,15 @@ int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev,
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return -EINVAL;
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}
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bhdr = (struct binary_header *)discovery_bin;
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offset = le16_to_cpu(bhdr->table_list[NPS_INFO].offset);
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if (amdgpu_discovery_get_table_info(adev, &info, NPS_INFO))
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return -EINVAL;
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offset = le16_to_cpu(info->offset);
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if (!offset)
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return -ENOENT;
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/* If verification fails, return as if NPS table doesn't exist */
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if (amdgpu_discovery_verify_npsinfo(adev, bhdr))
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if (amdgpu_discovery_verify_npsinfo(adev, info))
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return -ENOENT;
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nps_info = (union nps_info *)(discovery_bin + offset);
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@ -64,6 +64,19 @@ typedef struct binary_header
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table_info table_list[TOTAL_TABLES];
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} binary_header;
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typedef struct binary_header_v2
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{
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/* psp structure should go at the top of this structure */
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uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */
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uint16_t version_major; /* 0x02 */
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uint16_t version_minor;
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uint16_t binary_checksum; /* Byte sum of the binary after this field */
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uint16_t binary_size; /* Binary Size*/
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uint16_t num_tables;
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uint16_t padding;
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table_info table_list[] __counted_by(num_tables);
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} binary_header_v2;
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typedef struct die_info
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{
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uint16_t die_id;
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