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drm/i915: Use the correct plane source width in watermark calculations

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Currently we sometimes use the plane destination width, or just the
pipe src width as the plane source width in the watermark calculatons.
Use the correct thing everywhere.

v2: convert ilk cur/fbc cases too

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211209144311.3221-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä 2021-12-09 16:43:10 +02:00
parent 4be990af2f
commit d05824796d
1 changed files with 10 additions and 11 deletions
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21
drivers/gpu/drm/i915/intel_pm.c
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@ -1165,8 +1165,7 @@ static u16 g4x_compute_wm(const struct intel_crtc_state *crtc_state,
pixel_rate = crtc_state->pixel_rate;
htotal = pipe_mode->crtc_htotal;
width = drm_rect_width(&plane_state->uapi.dst);
width = drm_rect_width(&plane_state->uapi.src) >> 16;
if (plane->id == PLANE_CURSOR) {
wm = intel_wm_method2(pixel_rate, htotal, width, cpp, latency);
@ -1673,7 +1672,7 @@ static u16 vlv_compute_wm_level(const struct intel_crtc_state *crtc_state,
cpp = plane_state->hw.fb->format->cpp[0];
pixel_rate = crtc_state->pixel_rate;
htotal = pipe_mode->crtc_htotal;
width = crtc_state->pipe_src_w;
width = drm_rect_width(&plane_state->uapi.src) >> 16;
if (plane->id == PLANE_CURSOR) {
/*
@ -2267,12 +2266,12 @@ static void i965_update_wm(struct drm_i915_private *dev_priv)
crtc->base.primary->state->fb;
int pixel_rate = crtc->config->pixel_rate;
int htotal = pipe_mode->crtc_htotal;
int hdisplay = crtc->config->pipe_src_w;
int width = drm_rect_width(&crtc->base.primary->state->src) >> 16;
int cpp = fb->format->cpp[0];
int entries;
entries = intel_wm_method2(pixel_rate, htotal,
hdisplay, cpp, sr_latency_ns / 100);
width, cpp, sr_latency_ns / 100);
entries = DIV_ROUND_UP(entries, I915_FIFO_LINE_SIZE);
srwm = I965_FIFO_SIZE - entries;
if (srwm < 0)
@ -2442,7 +2441,7 @@ static void i9xx_update_wm(struct drm_i915_private *dev_priv)
enabled->base.primary->state->fb;
int pixel_rate = enabled->config->pixel_rate;
int htotal = pipe_mode->crtc_htotal;
int hdisplay = enabled->config->pipe_src_w;
int width = drm_rect_width(&enabled->base.primary->state->src) >> 16;
int cpp;
int entries;
@ -2451,7 +2450,7 @@ static void i9xx_update_wm(struct drm_i915_private *dev_priv)
else
cpp = fb->format->cpp[0];
entries = intel_wm_method2(pixel_rate, htotal, hdisplay, cpp,
entries = intel_wm_method2(pixel_rate, htotal, width, cpp,
sr_latency_ns / 100);
entries = DIV_ROUND_UP(entries, wm_info->cacheline_size);
drm_dbg_kms(&dev_priv->drm,
@ -2586,7 +2585,7 @@ static u32 ilk_compute_pri_wm(const struct intel_crtc_state *crtc_state,
method2 = ilk_wm_method2(crtc_state->pixel_rate,
crtc_state->hw.pipe_mode.crtc_htotal,
drm_rect_width(&plane_state->uapi.dst),
drm_rect_width(&plane_state->uapi.src) >> 16,
cpp, mem_value);
return min(method1, method2);
@ -2614,7 +2613,7 @@ static u32 ilk_compute_spr_wm(const struct intel_crtc_state *crtc_state,
method1 = ilk_wm_method1(crtc_state->pixel_rate, cpp, mem_value);
method2 = ilk_wm_method2(crtc_state->pixel_rate,
crtc_state->hw.pipe_mode.crtc_htotal,
drm_rect_width(&plane_state->uapi.dst),
drm_rect_width(&plane_state->uapi.src) >> 16,
cpp, mem_value);
return min(method1, method2);
}
@ -2639,7 +2638,7 @@ static u32 ilk_compute_cur_wm(const struct intel_crtc_state *crtc_state,
return ilk_wm_method2(crtc_state->pixel_rate,
crtc_state->hw.pipe_mode.crtc_htotal,
drm_rect_width(&plane_state->uapi.dst),
drm_rect_width(&plane_state->uapi.src) >> 16,
cpp, mem_value);
}
@ -2655,7 +2654,7 @@ static u32 ilk_compute_fbc_wm(const struct intel_crtc_state *crtc_state,
cpp = plane_state->hw.fb->format->cpp[0];
return ilk_wm_fbc(pri_val, drm_rect_width(&plane_state->uapi.dst),
return ilk_wm_fbc(pri_val, drm_rect_width(&plane_state->uapi.src) >> 16,
cpp);
}