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clk: renesas: mstp: Convert to readl_poll_timeout_atomic()

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Use readl_poll_timeout_atomic() instead of open-coding the same
operation.

As typically no retries are needed, 10 µs is a suitable timeout value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/bce7d0bdd80c800aa150f1868b610b7d94f4cc66.1685692810.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2023-06-02 10:50:39 +02:00
parent 14e53669cb
commit d0414e762f
1 changed files with 7 additions and 11 deletions
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18
drivers/clk/renesas/clk-mstp.c
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@ -14,6 +14,7 @@
#include <linux/clk/renesas.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/pm_clock.h>
@ -78,8 +79,8 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
struct mstp_clock_group *group = clock->group;
u32 bitmask = BIT(clock->bit_index);
unsigned long flags;
unsigned int i;
u32 value;
int ret;
spin_lock_irqsave(&group->lock, flags);
@ -101,19 +102,14 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
if (!enable || !group->mstpsr)
return 0;
for (i = 1000; i > 0; --i) {
if (!(cpg_mstp_read(group, group->mstpsr) & bitmask))
break;
cpu_relax();
}
if (!i) {
/* group->width_8bit is always false if group->mstpsr is present */
ret = readl_poll_timeout_atomic(group->mstpsr, value,
!(value & bitmask), 0, 10);
if (ret)
pr_err("%s: failed to enable %p[%d]\n", __func__,
group->smstpcr, clock->bit_index);
return -ETIMEDOUT;
}
return 0;
return ret;
}
static int cpg_mstp_clock_enable(struct clk_hw *hw)