From d031ad7267053c0ee41b6b799efc949732a8237c Mon Sep 17 00:00:00 2001 From: Wu Liangqing Date: Sat, 18 Mar 2023 02:23:35 +0000 Subject: [PATCH] arm64: dts: rockchip: adaptive rk3399-sapphire-excavator Change-Id: I3e7b80091775414c1d51eda1cb14c50c0e930fc2 Signed-off-by: Wu Liangqing --- .../rk3399-sapphire-excavator-edp.dtsi | 51 ++++++-- .../boot/dts/rockchip/rk3399-sapphire.dtsi | 117 ++++++++++++++++-- 2 files changed, 151 insertions(+), 17 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dtsi index 67aab337f66f..89ff138a5794 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-edp.dtsi @@ -11,6 +11,46 @@ #include "rk3399-vop-clk-set.dtsi" / { + backlight: backlight { + compatible = "pwm-backlight"; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + pwms = <&pwm0 0 25000 0>; + enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; + }; + vcc_lcd: vcc-lcd { compatible = "regulator-fixed"; regulator-name = "vcc_lcd"; @@ -20,7 +60,7 @@ vcc_lcd: vcc-lcd { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; - vin-supply = <&vcc5v0_sys>; + vin-supply = <&vcc_sys>; }; panel: panel { @@ -70,10 +110,6 @@ hdmiin_sound: hdmiin-sound { }; }; -&backlight { - status = "okay"; - enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; -}; &edp { status = "okay"; @@ -102,11 +138,6 @@ &rt5651 { status = "okay"; }; -&cdn_dp { - status = "okay"; - extcon = <&fusb0>; - phys = <&tcphy0_dp>; -}; &hdmi_dp_sound { status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi index 3d9e27750139..dadafc3d399e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. */ +#include "dt-bindings/usb/pd.h" #include "dt-bindings/pwm/pwm.h" #include "dt-bindings/input/input.h" #include "rk3399.dtsi" @@ -137,6 +138,11 @@ vdd_log: vdd-log { }; }; +&cdn_dp { + status = "okay"; + phys = <&tcphy0_dp>; +}; + &cpu_l0 { cpu-supply = <&vdd_cpu_l>; }; @@ -205,7 +211,6 @@ &gpu { }; &hdmi { - ddc-i2c-bus = <&i2c3>; status = "okay"; }; @@ -437,10 +442,77 @@ regulator-state-mem { }; }; -&i2c3 { - i2c-scl-rising-time-ns = <450>; - i2c-scl-falling-time-ns = <15>; +&i2c4 { status = "okay"; + i2c-scl-rising-time-ns = <475>; + i2c-scl-falling-time-ns = <26>; + + usbc0: fusb302@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vcc5v0_typec0>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_role_sw: endpoint@0 { + remote-endpoint = <&dwc3_0_role_switch>; + }; + }; + }; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + op-sink-microwatt = <1000000>; + sink-pdos = + ; + source-pdos = + ; + + displayport = <&cdn_dp>; + + altmodes { + #address-cells = <1>; + #size-cells = <0>; + + altmode@0 { + reg = <0>; + svid = <0xff01>; + vdo = <0xffffffff>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_orien_sw: endpoint { + remote-endpoint = <&tcphy0_orientation_switch>; + }; + }; + port@1 { + reg = <1>; + dp_mode_sw: endpoint { + remote-endpoint = <&tcphy_dp_altmode_switch>; + }; + }; + }; + }; + }; }; &i2s2 { @@ -502,6 +574,13 @@ vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; }; + }; + + usb-typec { + usbc0_int: usbc0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + vcc5v0_typec0_en: vcc5v0-typec0-en { rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; @@ -549,6 +628,21 @@ &sdmmc { &tcphy0 { status = "okay"; + svid = <0xff01>; + orientation-switch; + + port { + #address-cells = <1>; + #size-cells = <0>; + tcphy0_orientation_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_orien_sw>; + }; + tcphy_dp_altmode_switch: endpoint@1 { + reg = <1>; + remote-endpoint = <&dp_mode_sw>; + }; + }; }; &tcphy1 { @@ -571,7 +665,7 @@ u2phy0_otg: otg-port { }; u2phy0_host: host-port { - phy-supply = <&vcc5v0_typec0>; + phy-supply = <&vcc5v0_host>; status = "okay"; }; }; @@ -621,7 +715,16 @@ &usbdrd3_0 { &usbdrd_dwc3_0 { status = "okay"; - dr_mode = "host"; + dr_mode = "otg"; + usb-role-switch; + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_0_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_role_sw>; + }; + }; }; &usbdrd3_1 { @@ -647,4 +750,4 @@ &vopl { &vopl_mmu { status = "okay"; -}; +}; \ No newline at end of file