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arm64: dts: rockchip: Add gmac phy reset GPIO to QNAP TS433

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While looking through the vendor U-Boot code Heiko spotted that a SoC
GPIO is connected to the ethernet phy's reset pin. Add the respective
reset-gpios property with pinmuxing for the GPIO to the phy node.

Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/49f66206fccc714a8745b9ac35247615ad5cc369.1742331667.git.ukleinek@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Uwe Kleine-König 2025-03-18 22:08:46 +01:00 committed by Heiko Stuebner
parent 831263a416
commit d01e09a9f7
1 changed files with 10 additions and 0 deletions
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10
arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts
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@ -485,6 +485,10 @@ rgmii_phy0: ethernet-phy@3 {
/* Motorcomm YT8521 phy */
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x3>;
pinctrl-0 = <&eth_phy0_reset_pin>;
pinctrl-names = "default";
reset-assert-us = <10000>;
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>;
};
};
@ -557,6 +561,12 @@ &pcie3x2 {
};
&pinctrl {
gmac0 {
eth_phy0_reset_pin: eth-phy0-reset-pin {
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
copy_button_pin: copy-button-pin {
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;