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drm/amd/pm: update dpm clock pm attributes for aldebaran (gc 9.4.2)

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v1:
Separate DPM clock attribute constraints for Arcturus (9.4.1) and
Aldebaran (9.4.2) ASICs.

- For Aldebaran:
  * mclk/socclk: Disable write, only voltage control supported
  * fclk/pcie: Mark as unsupported
- Remove 9.4.2 from global pcie check and handle it in ASIC specific case
- Update comments to reflect correct hardware names

v2:
fix some coding logic issue (by asad)

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yang Wang 2026-05-08 10:31:22 +08:00 committed by Alex Deucher
parent b03d53598b
commit d00df38937
1 changed files with 15 additions and 4 deletions
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19
drivers/gpu/drm/amd/pm/amdgpu_pm.c
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@ -2034,15 +2034,13 @@ static int pp_dpm_clk_default_attr_update(struct amdgpu_device *adev, struct amd
gc_ver == IP_VERSION(11, 0, 3)) && adev->vcn.num_vcn_inst >= 2))
*states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(pp_dpm_pcie)) {
if (gc_ver == IP_VERSION(9, 4, 2) ||
amdgpu_is_multi_aid(adev))
if (amdgpu_is_multi_aid(adev))
*states = ATTR_STATE_UNSUPPORTED;
}
switch (gc_ver) {
case IP_VERSION(9, 4, 1):
case IP_VERSION(9, 4, 2):
/* the Mi series card does not support standalone mclk/socclk/fclk level setting */
/* Arcturus does not support standalone mclk/socclk/fclk level setting */
if (DEVICE_ATTR_IS(pp_dpm_mclk) ||
DEVICE_ATTR_IS(pp_dpm_socclk) ||
DEVICE_ATTR_IS(pp_dpm_fclk)) {
@ -2050,6 +2048,19 @@ static int pp_dpm_clk_default_attr_update(struct amdgpu_device *adev, struct amd
dev_attr->store = NULL;
}
break;
case IP_VERSION(9, 4, 2):
if (DEVICE_ATTR_IS(pp_dpm_mclk) ||
DEVICE_ATTR_IS(pp_dpm_socclk)) {
/* Aldebaran mclk/socclk DPM only supports voltage control,
* not allow to set dpm level directly */
dev_attr->attr.mode &= ~S_IWUGO;
dev_attr->store = NULL;
} else if (DEVICE_ATTR_IS(pp_dpm_fclk) ||
DEVICE_ATTR_IS(pp_dpm_pcie)) {
/* Aldebaran does not support fclk/pcie dpm */
*states = ATTR_STATE_UNSUPPORTED;
}
break;
default:
break;
}