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drm/i915/dp: Restrict max source rate for WCL to HBR3

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WCL supports a maximum of HBR3 8.1 Gbps for both eDP/DP.
Limit the max source rate to HBR3 for WCL.

v2: Move the check inside mtl_max_source_rate(). (Suraj)

Bspec:74286
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20251122053651.759389-1-ankit.k.nautiyal@intel.com
This commit is contained in:
Ankit Nautiyal 2025-11-22 11:06:51 +05:30
parent 0c8afa67aa
commit cffa413f1c
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/i915/display/intel_dp.c
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@ -520,7 +520,8 @@ static int mtl_max_source_rate(struct intel_dp *intel_dp)
struct intel_display *display = to_intel_display(intel_dp);
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
if (intel_encoder_is_c10phy(encoder))
if (intel_encoder_is_c10phy(encoder) ||
display->platform.pantherlake_wildcatlake)
return 810000;
if (DISPLAY_VERx100(display) == 1401)