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drm/amd/display: Program DIG FE source select for DVI before PHY en

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[Description]
In newer DCN's the programming of SYMCLK_FE_SRC_SEL depends on
the value of DIG_FE_SOURCE_SELECT. If DIG_FE_SOURCE_SELECT is not
already programmed at the time of PHY / DIG enable then the FW
sequence will program an incorrect SYMCLK source. Ensure that we
program DIG_FE_SOURCE_SELECT for all DIO scenarios (DVI in this
particular case) before going through the PHY / DIG enable sequence.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alvin Lee 2024-05-20 12:52:31 -04:00 committed by Alex Deucher
parent 839eb4bbbd
commit cf58fdca00
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/link/link_dpms.c
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@ -1976,7 +1976,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
/* We need to enable stream encoder for TMDS first to apply 1/4 TMDS
* character clock in case that beyond 340MHz.
*/
if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal) || dc_is_dvi_signal(pipe_ctx->stream->signal))
link_hwss->setup_stream_encoder(pipe_ctx);
dc->hwss.enable_tmds_link_output(