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Merge branch 'net-dsa-b53-mmap-add-bcm63xx-ephy-power-control'
Kyle Hendry says: ==================== net: dsa: b53: mmap: Add bcm63xx EPHY power control The gpio controller on some bcm63xx SoCs has a register for controlling functionality of the internal fast ethernet phys. These patches allow the b53 driver to enable/disable phy power. The register also contains reset bits which will be set by a reset driver in another patch series: https://lore.kernel.org/all/20250715234605.36216-1-kylehendrydev@gmail.com/ v1: https://lore.kernel.org/20250716002922.230807-1-kylehendrydev@gmail.com ==================== Link: https://patch.msgid.link/20250724035300.20497-1-kylehendrydev@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski
commit
cf51016ba8
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@ -66,6 +66,12 @@ properties:
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- brcm,bcm63268-switch
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- const: brcm,bcm63xx-switch
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brcm,gpio-ctrl:
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description:
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A phandle to the syscon node of the bcm63xx gpio controller
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which contains phy control registers
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$ref: /schemas/types.yaml#/definitions/phandle
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required:
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- compatible
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- reg
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@ -689,6 +689,9 @@ int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)
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cpu_port = dsa_to_port(ds, port)->cpu_dp->index;
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if (dev->ops->phy_enable)
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dev->ops->phy_enable(dev, port);
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if (dev->ops->irq_enable)
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ret = dev->ops->irq_enable(dev, port);
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if (ret)
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@ -727,6 +730,9 @@ void b53_disable_port(struct dsa_switch *ds, int port)
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reg |= PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
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b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);
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if (dev->ops->phy_disable)
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dev->ops->phy_disable(dev, port);
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if (dev->ops->irq_disable)
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dev->ops->irq_disable(dev, port);
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}
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@ -1404,7 +1410,7 @@ static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,
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b53_read8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), &rgmii_ctrl);
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rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
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if (is63268(dev))
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if (is6318_268(dev))
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rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
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rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
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@ -2768,19 +2774,6 @@ static const struct b53_chip_data b53_switch_chips[] = {
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
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.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
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},
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{
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.chip_id = BCM63268_DEVICE_ID,
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.dev_name = "BCM63268",
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.vlans = 4096,
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.enabled_ports = 0, /* pdata must provide them */
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.arl_bins = 4,
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.arl_buckets = 1024,
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.imp_port = 8,
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.vta_regs = B53_VTA_REGS_63XX,
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.duplex_reg = B53_DUPLEX_STAT_63XX,
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.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
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.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
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},
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{
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.chip_id = BCM53010_DEVICE_ID,
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.dev_name = "BCM53010",
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@ -2930,13 +2923,17 @@ static const struct b53_chip_data b53_switch_chips[] = {
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static int b53_switch_init(struct b53_device *dev)
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{
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u32 chip_id = dev->chip_id;
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unsigned int i;
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int ret;
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if (is63xx(dev))
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chip_id = BCM63XX_DEVICE_ID;
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for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
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const struct b53_chip_data *chip = &b53_switch_chips[i];
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if (chip->chip_id == dev->chip_id) {
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if (chip->chip_id == chip_id) {
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if (!dev->enabled_ports)
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dev->enabled_ports = chip->enabled_ports;
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dev->name = chip->dev_name;
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@ -21,13 +21,54 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/b53.h>
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#include <linux/regmap.h>
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#include "b53_priv.h"
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#define BCM63XX_EPHY_REG 0x3C
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struct b53_phy_info {
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u32 ephy_enable_mask;
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u32 ephy_port_mask;
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u32 ephy_bias_bit;
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const u32 *ephy_offset;
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};
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struct b53_mmap_priv {
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void __iomem *regs;
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struct regmap *gpio_ctrl;
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const struct b53_phy_info *phy_info;
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u32 phys_enabled;
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};
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static const u32 bcm6318_ephy_offsets[] = {4, 5, 6, 7};
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static const struct b53_phy_info bcm6318_ephy_info = {
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.ephy_enable_mask = BIT(0) | BIT(4) | BIT(8) | BIT(12) | BIT(16),
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.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6318_ephy_offsets) - 1), 0),
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.ephy_bias_bit = 24,
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.ephy_offset = bcm6318_ephy_offsets,
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};
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static const u32 bcm6368_ephy_offsets[] = {2, 3, 4, 5};
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static const struct b53_phy_info bcm6368_ephy_info = {
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.ephy_enable_mask = BIT(0),
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.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6368_ephy_offsets) - 1), 0),
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.ephy_bias_bit = 0,
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.ephy_offset = bcm6368_ephy_offsets,
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};
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static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};
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static const struct b53_phy_info bcm63268_ephy_info = {
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.ephy_enable_mask = GENMASK(4, 0),
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.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm63268_ephy_offsets) - 1), 0),
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.ephy_bias_bit = 24,
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.ephy_offset = bcm63268_ephy_offsets,
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};
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static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
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@ -229,6 +270,50 @@ static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,
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return -EIO;
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}
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static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)
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{
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struct b53_mmap_priv *priv = dev->priv;
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const struct b53_phy_info *info = priv->phy_info;
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struct regmap *gpio_ctrl = priv->gpio_ctrl;
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u32 mask, val;
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if (enable) {
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mask = (info->ephy_enable_mask << info->ephy_offset[port])
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| BIT(info->ephy_bias_bit);
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val = 0;
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} else {
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mask = (info->ephy_enable_mask << info->ephy_offset[port]);
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if (!((priv->phys_enabled & ~BIT(port)) & info->ephy_port_mask))
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mask |= BIT(info->ephy_bias_bit);
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val = mask;
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}
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return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);
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}
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static void b53_mmap_phy_enable(struct b53_device *dev, int port)
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{
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struct b53_mmap_priv *priv = dev->priv;
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int ret = 0;
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if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
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ret = bcm63xx_ephy_set(dev, port, true);
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if (!ret)
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priv->phys_enabled |= BIT(port);
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}
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static void b53_mmap_phy_disable(struct b53_device *dev, int port)
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{
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struct b53_mmap_priv *priv = dev->priv;
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int ret = 0;
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if (priv->phy_info && (BIT(port) & priv->phy_info->ephy_port_mask))
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ret = bcm63xx_ephy_set(dev, port, false);
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if (!ret)
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priv->phys_enabled &= ~BIT(port);
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}
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static const struct b53_io_ops b53_mmap_ops = {
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.read8 = b53_mmap_read8,
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.read16 = b53_mmap_read16,
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@ -242,6 +327,8 @@ static const struct b53_io_ops b53_mmap_ops = {
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.write64 = b53_mmap_write64,
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.phy_read16 = b53_mmap_phy_read16,
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.phy_write16 = b53_mmap_phy_write16,
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.phy_enable = b53_mmap_phy_enable,
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.phy_disable = b53_mmap_phy_disable,
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};
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static int b53_mmap_probe_of(struct platform_device *pdev,
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@ -313,6 +400,18 @@ static int b53_mmap_probe(struct platform_device *pdev)
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priv->regs = pdata->regs;
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priv->gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");
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if (!IS_ERR(priv->gpio_ctrl)) {
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if (pdata->chip_id == BCM6318_DEVICE_ID ||
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pdata->chip_id == BCM6328_DEVICE_ID ||
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pdata->chip_id == BCM6362_DEVICE_ID)
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priv->phy_info = &bcm6318_ephy_info;
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else if (pdata->chip_id == BCM6368_DEVICE_ID)
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priv->phy_info = &bcm6368_ephy_info;
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else if (pdata->chip_id == BCM63268_DEVICE_ID)
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priv->phy_info = &bcm63268_ephy_info;
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}
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dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
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if (!dev)
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return -ENOMEM;
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@ -348,16 +447,16 @@ static const struct of_device_id b53_mmap_of_table[] = {
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.data = (void *)BCM63XX_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6318-switch",
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.data = (void *)BCM63268_DEVICE_ID,
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.data = (void *)BCM6318_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6328-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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.data = (void *)BCM6328_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6362-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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.data = (void *)BCM6362_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6368-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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.data = (void *)BCM6368_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm63268-switch",
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.data = (void *)BCM63268_DEVICE_ID,
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@ -45,6 +45,8 @@ struct b53_io_ops {
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int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);
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int (*irq_enable)(struct b53_device *dev, int port);
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void (*irq_disable)(struct b53_device *dev, int port);
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void (*phy_enable)(struct b53_device *dev, int port);
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void (*phy_disable)(struct b53_device *dev, int port);
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void (*phylink_get_caps)(struct b53_device *dev, int port,
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struct phylink_config *config);
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struct phylink_pcs *(*phylink_mac_select_pcs)(struct b53_device *dev,
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@ -71,6 +73,10 @@ enum {
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BCM53125_DEVICE_ID = 0x53125,
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BCM53128_DEVICE_ID = 0x53128,
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BCM63XX_DEVICE_ID = 0x6300,
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BCM6318_DEVICE_ID = 0x6318,
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BCM6328_DEVICE_ID = 0x6328,
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BCM6362_DEVICE_ID = 0x6362,
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BCM6368_DEVICE_ID = 0x6368,
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BCM63268_DEVICE_ID = 0x63268,
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BCM53010_DEVICE_ID = 0x53010,
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BCM53011_DEVICE_ID = 0x53011,
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@ -218,12 +224,17 @@ static inline int is531x5(struct b53_device *dev)
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static inline int is63xx(struct b53_device *dev)
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{
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return dev->chip_id == BCM63XX_DEVICE_ID ||
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dev->chip_id == BCM6318_DEVICE_ID ||
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dev->chip_id == BCM6328_DEVICE_ID ||
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dev->chip_id == BCM6362_DEVICE_ID ||
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dev->chip_id == BCM6368_DEVICE_ID ||
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dev->chip_id == BCM63268_DEVICE_ID;
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}
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static inline int is63268(struct b53_device *dev)
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static inline int is6318_268(struct b53_device *dev)
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{
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return dev->chip_id == BCM63268_DEVICE_ID;
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return dev->chip_id == BCM6318_DEVICE_ID ||
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dev->chip_id == BCM63268_DEVICE_ID;
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}
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static inline int is5301x(struct b53_device *dev)
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