From b18c8aea6d962bfd89c6c265d7656eb45cc0e432 Mon Sep 17 00:00:00 2001 From: Ryan Wanner Date: Wed, 25 Feb 2026 14:24:25 +0530 Subject: [PATCH 1/4] ARM: dts: microchip: sama7d65: add LCD controller Add support for LCD controller node Signed-off-by: Ryan Wanner Signed-off-by: Manikandan Muralidharan Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20260225085430.480052-2-manikandan.m@microchip.com [claudiu.beznea: add a space b/w the node address and the next '{'] Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index e21556f46384..42e8d7ad8821 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -278,6 +278,32 @@ sdmmc1: mmc@e1208000 { status = "disabled"; }; + xlcdc: lcd-controller@e1400000 { + compatible = "microchip,sama7d65-xlcdc"; + reg = <0xe1400000 0x2000>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>, <&clk32k 1>; + clock-names = "periph_clk", "sys_clk", "slow_clk"; + status = "disabled"; + + display-controller { + compatible = "atmel,hlcdc-display-controller"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + pwm { + compatible = "atmel,hlcdc-pwm"; + #pwm-cells = <3>; + }; + }; + aes: crypto@e1600000 { compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; reg = <0xe1600000 0x100>; From d83734a0bd253cab38b52065b2e35fa34c2d8770 Mon Sep 17 00:00:00 2001 From: Ryan Wanner Date: Wed, 25 Feb 2026 14:24:27 +0530 Subject: [PATCH 2/4] ARM: dts: microchip: sama7d65: add LVDS controller Add support for LVDS controller node Signed-off-by: Ryan Wanner Signed-off-by: Manikandan Muralidharan Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20260225085430.480052-4-manikandan.m@microchip.com Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 42e8d7ad8821..80cfdec42ec4 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -304,6 +304,15 @@ pwm { }; }; + lvdsc: lvds-controller@e1408000 { + compatible = "microchip,sama7d65-lvds", "microchip,sam9x75-lvds"; + reg = <0xe1408000 0x100>; + interrupts = ; + clocks = <&pmc PMC_TYPE_PERIPHERAL 104>; + clock-names = "pclk"; + status = "disabled"; + }; + aes: crypto@e1600000 { compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; reg = <0xe1600000 0x100>; From c52f2944492590c59599b0663f05611320efe441 Mon Sep 17 00:00:00 2001 From: Charan Pedumuru Date: Sat, 7 Mar 2026 09:16:18 +0000 Subject: [PATCH 3/4] arm: dts: microchip: remove unused #address-cells/#size-cells from sam9x60 udc node The UDC node does not define any child nodes, so the "#address-cells" and "#size-cells" properties are unnecessary. Remove these unused properties to simplify the devicetree node and keep it consistent with DT conventions. Signed-off-by: Charan Pedumuru Link: https://lore.kernel.org/r/20260307-atmel-usb-v3-1-3dc48fe772be@gmail.com Reviewed-by: Claudiu Beznea [claudiu.beznea: s/at91/microchip in commit title] Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index b075865e6a76..e708b3df4ccd 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -75,8 +75,6 @@ ahb { ranges; usb0: gadget@500000 { - #address-cells = <1>; - #size-cells = <0>; compatible = "microchip,sam9x60-udc"; reg = <0x00500000 0x100000 0xf803c000 0x400>; From 7d7a9fc1310a0ade8ea61c5eb4d8b29456f8d604 Mon Sep 17 00:00:00 2001 From: Mihai Sain Date: Tue, 24 Mar 2026 09:09:27 +0200 Subject: [PATCH 4/4] ARM: dts: microchip: sama7d65: add Cortex-A7 PMU node Add the Performance Monitoring Unit (PMU) node with the appropriate compatible string and interrupt line so that perf and other PMU-based tooling can function correctly on this SoC. [root@SAMA7D65 ~]$ dmesg | grep -i pmu [ 1.487869] hw-perfevents: enabled with armv7_cortex_a7 PMU driver, 5 (8000000f) counters available [root@SAMA7D65 ~]$ perf list hw List of pre-defined events (to be used in -e or -M): branch-instructions OR branches [Hardware event] branch-misses [Hardware event] bus-cycles [Hardware event] cache-misses [Hardware event] cache-references [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event] Signed-off-by: Mihai Sain Link: https://lore.kernel.org/r/20260324070927.1496-2-mihai.sain@microchip.com [claudiu.beznea: keep nodes alphanumerically sorted] Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 80cfdec42ec4..67253bbc08df 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -67,6 +67,11 @@ ns_sram: sram@100000 { #size-cells = <1>; }; + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = ; + }; + soc { compatible = "simple-bus"; ranges;