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ARM: tegra: Add missing HOST1X device nodes on Tegra114

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Add nodes for devices on the HOST1X bus: VI, EPP, ISP, MSENC and TSEC.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Svyatoslav Ryhel 2025-10-16 10:41:50 +03:00 committed by Thierry Reding
parent 3a86608788
commit cead96a67e
1 changed files with 64 additions and 0 deletions
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64
arch/arm/boot/dts/nvidia/tegra114.dtsi
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@ -48,6 +48,45 @@ host1x@50000000 {
ranges = <0x54000000 0x54000000 0x01000000>;
vi@54080000 {
compatible = "nvidia,tegra114-vi";
reg = <0x54080000 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_VI>;
resets = <&tegra_car 20>;
reset-names = "vi";
iommus = <&mc TEGRA_SWGROUP_VI>;
status = "disabled";
};
epp@540c0000 {
compatible = "nvidia,tegra114-epp";
reg = <0x540c0000 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_EPP>;
resets = <&tegra_car TEGRA114_CLK_EPP>;
reset-names = "epp";
iommus = <&mc TEGRA_SWGROUP_EPP>;
status = "disabled";
};
isp@54100000 {
compatible = "nvidia,tegra114-isp";
reg = <0x54100000 0x00040000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_ISP>;
resets = <&tegra_car TEGRA114_CLK_ISP>;
reset-names = "isp";
iommus = <&mc TEGRA_SWGROUP_ISP>;
status = "disabled";
};
gr2d@54140000 {
compatible = "nvidia,tegra114-gr2d";
reg = <0x54140000 0x00040000>;
@ -150,6 +189,31 @@ dsib: dsi@54400000 {
#address-cells = <1>;
#size-cells = <0>;
};
msenc@544c0000 {
compatible = "nvidia,tegra114-msenc";
reg = <0x544c0000 0x00040000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_MSENC>;
resets = <&tegra_car TEGRA114_CLK_MSENC>;
reset-names = "mpe";
iommus = <&mc TEGRA_SWGROUP_MSENC>;
status = "disabled";
};
tsec@54500000 {
compatible = "nvidia,tegra114-tsec";
reg = <0x54500000 0x00040000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_TSEC>;
resets = <&tegra_car TEGRA114_CLK_TSEC>;
iommus = <&mc TEGRA_SWGROUP_TSEC>;
status = "disabled";
};
};
gic: interrupt-controller@50041000 {