From ce36dbeb2951607304cc5451a33ddcf06880d726 Mon Sep 17 00:00:00 2001 From: Can Guo Date: Tue, 16 Jun 2026 04:33:47 -0700 Subject: [PATCH] scsi: ufs: dt-bindings: Document static TX Equalization settings properties UFS v5.0/UFSHCI v5.0 adds HS-G6 support (46.6 Gbps/lane) via UniPro v3.0 and M-PHY v6.0. These specs define TX Equalization for all High-Speed Gears (not only HS-G6) to compensate channel loss and improve signal integrity at high speed. For HS-G6, M-PHY uses PAM4 1b1b line coding. Pre-Coding may also be required depending on channel characteristics. Document vendor-neutral properties in ufs-common.yaml: - txeq-preshoot-g[1-6] - txeq-deemphasis-g[1-6] - tx-precode-enable-g6 Values are per-lane Host/Device tuples (2 values for x1, 4 values for x2). PreShoot/DeEmphasis range from 0..7, and Precode is 0/1. These are board-specific signal-integrity tuning values. They depend on channel SI/PHY characterization and validation (host PHY, device PHY, package, and board routing), and are determined by HW/PHY designers. Although UFSHCI v5.0 supports TX Equalization Training via UniPro v3.0, which allows host software to determine optimal TX Equalization at runtime, static board-specific TX Equalization settings in the Device Tree are still necessary because: - TX Equalization Training is not supported for HS-G3 and below - TX Equalization Training is disabled on some platforms Reviewed-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Reviewed-by: Peter Wang Signed-off-by: Can Guo Link: https://patch.msgid.link/20260616113348.1168248-2-can.guo@oss.qualcomm.com Signed-off-by: Martin K. Petersen --- .../devicetree/bindings/ufs/ufs-common.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml index ed97f5682509..cc32e1189d50 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -105,6 +105,64 @@ properties: Restricts the UFS controller to rate-a or rate-b for both TX and RX directions. + tx-precode-enable-g6: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + items: + - items: + - description: Host_Lane0 precode + enum: [0, 1] + - description: Device_Lane0 precode + enum: [0, 1] + - items: + - description: Host_Lane1 precode + enum: [0, 1] + - description: Device_Lane1 precode + enum: [0, 1] + description: + Static TX Precode enable values for HS-G6 only. + +patternProperties: + "^txeq-preshoot-g[1-6]$": + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + items: + - items: + - description: Host_Lane0 Preshoot value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - description: Device_Lane0 Preshoot value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - items: + - description: Host_Lane1 Preshoot value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - description: Device_Lane1 Preshoot value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + description: | + Static TX Equalization PreShoot settings for High Speed Gears. These + values are programmed to the corresponding UniPro PA layer attribute + PA_TxEQG[1-6]Setting. Each value selects a Pre-Shoot level as defined + by the MIPI M-PHY specification (TX_HS_PreShoot_Setting). + + "^txeq-deemphasis-g[1-6]$": + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + items: + - items: + - description: Host_Lane0 DeEmphasis value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - description: Device_Lane0 DeEmphasis value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - items: + - description: Host_Lane1 DeEmphasis value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + - description: Device_Lane1 DeEmphasis value + enum: [0, 1, 2, 3, 4, 5, 6, 7] + description: | + Static TX Equalization DeEmphasis settings for High Speed Gears. These + values are programmed to the corresponding UniPro PA layer attribute + PA_TxEQG[1-6]Setting. Each value selects a De-Emphasis level as defined + by the MIPI M-PHY specification (TX_HS_DeEmphasis_Setting). + dependencies: freq-table-hz: [ clocks ] operating-points-v2: [ clocks, clock-names ]