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perf arm_spe: Introduce data processing macro for SVE operations

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Introduce the ARM_SPE_OP_DP (data processing) macro as associated
information for SVE operations. For SVE register access, only
ARM_SPE_OP_SVE is set; for SVE data processing, both ARM_SPE_OP_SVE and
ARM_SPE_OP_DP are set together.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Leo Yan 2025-11-12 18:24:35 +00:00 committed by Namhyung Kim
parent b64bf913b3
commit cdc1aff17f
3 changed files with 5 additions and 8 deletions
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4
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
View File

@ -201,12 +201,12 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
else
decoder->record.op |= ARM_SPE_OP_LD;
if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload))
decoder->record.op |= ARM_SPE_OP_SVE_LDST;
decoder->record.op |= ARM_SPE_OP_SVE;
break;
case SPE_OP_PKT_HDR_CLASS_OTHER:
decoder->record.op |= ARM_SPE_OP_OTHER;
if (SPE_OP_PKT_OTHER_SUBCLASS_SVE(payload))
decoder->record.op |= ARM_SPE_OP_SVE_OTHER;
decoder->record.op |= ARM_SPE_OP_SVE | ARM_SPE_OP_DP;
break;
case SPE_OP_PKT_HDR_CLASS_BR_ERET:
decoder->record.op |= ARM_SPE_OP_BRANCH_ERET;

4
tools/perf/util/arm-spe-decoder/arm-spe-decoder.h
View File

@ -43,8 +43,7 @@ enum arm_spe_2nd_op_ldst {
ARM_SPE_OP_UNSPEC_REG = 1 << 9,
ARM_SPE_OP_NV_SYSREG = 1 << 10,
ARM_SPE_OP_SIMD_FP = 1 << 11,
ARM_SPE_OP_SVE_OTHER = 1 << 12,
ARM_SPE_OP_SVE_LDST = 1 << 13,
ARM_SPE_OP_SVE = 1 << 12,
/* Assisted information for memory / SIMD */
ARM_SPE_OP_LD = 1 << 20,
@ -52,6 +51,7 @@ enum arm_spe_2nd_op_ldst {
ARM_SPE_OP_ATOMIC = 1 << 22,
ARM_SPE_OP_EXCL = 1 << 23,
ARM_SPE_OP_AR = 1 << 24,
ARM_SPE_OP_DP = 1 << 25, /* Data processing */
};
enum arm_spe_2nd_op_branch {

5
tools/perf/util/arm-spe.c
View File

@ -346,10 +346,7 @@ static struct simd_flags arm_spe__synth_simd_flags(const struct arm_spe_record *
{
struct simd_flags simd_flags = {};
if ((record->op & ARM_SPE_OP_LDST) && (record->op & ARM_SPE_OP_SVE_LDST))
simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE;
if ((record->op & ARM_SPE_OP_OTHER) && (record->op & ARM_SPE_OP_SVE_OTHER))
if (record->op & ARM_SPE_OP_SVE)
simd_flags.arch |= SIMD_OP_FLAGS_ARCH_SVE;
if (record->type & ARM_SPE_SVE_PARTIAL_PRED)