From cd4387fa57b4a2b276b40c61caa6e2e6ad217724 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 19 Mar 2026 13:40:28 +0200 Subject: [PATCH] drm/i915/wm: s/skl_check_nv12_wm_level()/skl_check_wm_level_nv12()/ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Rename skl_check_nv12_wm_level() to skl_check_wm_level_nv12(). There will be a sort of DDB counterparts to skl_check_wm_level*(), and putting the "nv12" part to the end will allow consistent naming. Signed-off-by: Ville Syrjälä Link: https://patch.msgid.link/20260319114034.7093-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 1664b84d0387..24978f312fec 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -1356,7 +1356,7 @@ skl_check_wm_level(struct skl_wm_level *wm, const struct skl_ddb_entry *ddb) } static void -skl_check_nv12_wm_level(struct skl_wm_level *wm, struct skl_wm_level *uv_wm, +skl_check_wm_level_nv12(struct skl_wm_level *wm, struct skl_wm_level *uv_wm, const struct skl_ddb_entry *ddb_y, const struct skl_ddb_entry *ddb) { if (wm->min_ddb_alloc > skl_ddb_entry_size(ddb_y) || @@ -1555,7 +1555,7 @@ skl_crtc_allocate_plane_ddb(struct intel_atomic_state *state, if (DISPLAY_VER(display) < 11 && crtc_state->nv12_planes & BIT(plane_id)) - skl_check_nv12_wm_level(&wm->wm[level], + skl_check_wm_level_nv12(&wm->wm[level], &wm->uv_wm[level], ddb_y, ddb); else