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arm64: dts: qcom: glymur: Add ADSP and CDSP for Glymur SoC
Add remoteproc PAS loader for ADSP and CDSP with its fastrpc nodes. Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260313120814.1312410-5-sibi.sankar@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Sibi Sankar
Bjorn Andersson
parent
675fec65df
commit
cd1d174c75
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@ -3784,6 +3784,122 @@ ipcc: mailbox@3e04000 {
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#mbox-cells = <2>;
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};
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remoteproc_adsp: remoteproc@6800000 {
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compatible = "qcom,glymur-adsp-pas", "qcom,sm8550-adsp-pas";
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reg = <0x0 0x06800000 0x0 0x10000>;
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iommus = <&apps_smmu 0x1000 0x0>;
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interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog",
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"fatal",
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"ready",
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"handover",
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"stop-ack",
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"shutdown-ack";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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interconnects = <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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power-domains = <&rpmhpd RPMHPD_LCX>,
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<&rpmhpd RPMHPD_LMX>;
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power-domain-names = "lcx",
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"lmx";
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memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
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qcom,qmp = <&aoss_qmp>;
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qcom,smem-states = <&smp2p_adsp_out 0>;
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qcom,smem-state-names = "stop";
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status = "disabled";
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remoteproc_adsp_glink: glink-edge {
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interrupts-extended = <&ipcc IPCC_MPROC_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_MPROC_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP>;
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qcom,remote-pid = <2>;
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label = "lpass";
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fastrpc {
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compatible = "qcom,glymur-fastrpc", "qcom,kaanapali-fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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label = "adsp";
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#address-cells = <1>;
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#size-cells = <0>;
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x1003 0x80>,
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<&apps_smmu 0x1063 0x20>;
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dma-coherent;
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x1004 0x80>,
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<&apps_smmu 0x1064 0x20>;
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dma-coherent;
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x1005 0x80>,
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<&apps_smmu 0x1065 0x20>;
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dma-coherent;
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};
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compute-cb@6 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x1006 0x80>,
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<&apps_smmu 0x1066 0x20>;
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dma-coherent;
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};
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compute-cb@7 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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iommus = <&apps_smmu 0x1007 0x40>,
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<&apps_smmu 0x1067 0x0>,
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<&apps_smmu 0x1087 0x0>;
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dma-coherent;
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};
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compute-cb@8 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <8>;
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iommus = <&apps_smmu 0x1008 0x80>,
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<&apps_smmu 0x1068 0x20>;
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dma-coherent;
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};
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};
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};
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};
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lpass_lpiaon_noc: interconnect@7400000 {
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compatible = "qcom,glymur-lpass-lpiaon-noc";
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reg = <0x0 0x07400000 0x0 0x19080>;
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@ -6002,6 +6118,176 @@ system-cache-controller@21800000 {
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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};
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remoteproc_cdsp: remoteproc@32300000 {
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compatible = "qcom,glymur-cdsp-pas", "qcom,sm8550-cdsp-pas";
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reg = <0x0 0x32300000 0x0 0x10000>;
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iommus = <&apps_smmu 0x2400 0x400>;
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interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog",
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"fatal",
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"ready",
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"handover",
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"stop-ack",
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"shutdown-ack";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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interconnects = <&nsp_noc MASTER_CDSP_PROC QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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power-domains = <&rpmhpd RPMHPD_CX>,
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<&rpmhpd RPMHPD_MXC>,
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<&rpmhpd RPMHPD_NSP>;
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power-domain-names = "cx",
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"mxc",
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"nsp";
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memory-region = <&cdsp_mem>, <&q6_cdsp_dtb_mem>;
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qcom,qmp = <&aoss_qmp>;
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qcom,smem-states = <&smp2p_cdsp_out 0>;
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qcom,smem-state-names = "stop";
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status = "disabled";
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glink-edge {
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interrupts-extended = <&ipcc IPCC_MPROC_CDSP
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_MPROC_CDSP
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IPCC_MPROC_SIGNAL_GLINK_QMP>;
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qcom,remote-pid = <5>;
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label = "cdsp";
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fastrpc {
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compatible = "qcom,glymur-fastrpc", "qcom,kaanapali-fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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label = "cdsp";
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#address-cells = <1>;
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#size-cells = <0>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <1>;
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iommus = <&apps_smmu 0x2401 0x440>,
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<&apps_smmu 0x1961 0x0>,
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<&apps_smmu 0x19c1 0x0>;
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dma-coherent;
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <2>;
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iommus = <&apps_smmu 0x2402 0x440>,
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<&apps_smmu 0x1962 0x0>,
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<&apps_smmu 0x19c2 0x0>;
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dma-coherent;
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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iommus = <&apps_smmu 0x2403 0x440>,
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<&apps_smmu 0x1963 0x0>,
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<&apps_smmu 0x19c3 0x0>;
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dma-coherent;
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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iommus = <&apps_smmu 0x2404 0x440>,
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<&apps_smmu 0x1964 0x0>,
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<&apps_smmu 0x19c4 0x0>;
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dma-coherent;
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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iommus = <&apps_smmu 0x2405 0x440>,
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<&apps_smmu 0x1965 0x0>,
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<&apps_smmu 0x19c5 0x0>;
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dma-coherent;
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};
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compute-cb@6 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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iommus = <&apps_smmu 0x2406 0x440>,
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<&apps_smmu 0x1966 0x0>,
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<&apps_smmu 0x19c6 0x0>;
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dma-coherent;
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};
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compute-cb@7 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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iommus = <&apps_smmu 0x2407 0x440>,
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<&apps_smmu 0x1967 0x0>,
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<&apps_smmu 0x19c7 0x0>;
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dma-coherent;
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};
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compute-cb@8 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <8>;
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iommus = <&apps_smmu 0x2408 0x440>,
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<&apps_smmu 0x1968 0x0>,
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<&apps_smmu 0x19c8 0x0>;
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dma-coherent;
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};
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/* note: compute-cb@9 is secure */
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compute-cb@10 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <10>;
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iommus = <&apps_smmu 0x240c 0x440>,
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<&apps_smmu 0x196c 0x0>,
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<&apps_smmu 0x19cc 0x0>;
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dma-coherent;
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};
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compute-cb@11 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <11>;
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iommus = <&apps_smmu 0x240d 0x440>,
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<&apps_smmu 0x196d 0x0>,
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<&apps_smmu 0x19cd 0x0>;
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dma-coherent;
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};
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compute-cb@12 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <12>;
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iommus = <&apps_smmu 0x240e 0x440>,
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<&apps_smmu 0x196e 0x0>,
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<&apps_smmu 0x19ce 0x0>;
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dma-coherent;
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};
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};
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};
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};
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nsp_noc: interconnect@320c0000 {
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compatible = "qcom,glymur-nsp-noc";
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reg = <0x0 0x320c0000 0x0 0x21280>;
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