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arm64: dts: qcom: qcs8300: enable the inline crypto engine
Add an ICE node to qcs8300 SoC description and enable it by adding a phandle to the UFS node. Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> Link: https://lore.kernel.org/r/20241125065801.1751256-3-quic_yrangana@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -717,6 +717,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
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<0 0>,
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<0 0>,
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<0 0>;
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qcom,ice = <&ice>;
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status = "disabled";
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};
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@ -767,6 +768,13 @@ crypto: crypto@1dfa000 {
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interconnect-names = "memory";
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};
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ice: crypto@1d88000 {
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compatible = "qcom,qcs8300-inline-crypto-engine",
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"qcom,inline-crypto-engine";
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reg = <0x0 0x01d88000 0x0 0x18000>;
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clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
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};
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tcsr_mutex: hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex";
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reg = <0x0 0x01f40000 0x0 0x20000>;
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