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ARM: dts: stm32: Add ST MIPID02 bindings to AV96
Add DT bindings for ST MIPID02 and DCMI to Avenger96 base DT. Both the ST MIPID02 and DCMI are disabled by default, as the AV96 camera module is optional. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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@ -126,6 +126,22 @@ adc2: adc@100 {
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};
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};
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&dcmi {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dcmi_pins_c>;
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pinctrl-1 = <&dcmi_sleep_pins_c>;
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status = "disabled";
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port {
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dcmi_0: endpoint {
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remote-endpoint = <&stmipi_2>;
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bus-type = <5>;
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bus-width = <8>;
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pclk-sample = <0>;
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};
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};
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};
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ðernet0 {
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status = "okay";
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pinctrl-0 = <ðernet0_rgmii_pins_c>;
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@ -219,6 +235,45 @@ &i2c2 { /* X6 I2C2 */
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};
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&i2c4 {
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stmipi: stmipi@14 {
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compatible = "st,st-mipid02";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&mco1_pins_a>;
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pinctrl-1 = <&mco1_sleep_pins_a>;
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reg = <0x14>;
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clocks = <&rcc CK_MCO1>;
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clock-names = "xclk";
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assigned-clocks = <&rcc CK_MCO1>;
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assigned-clock-parents = <&rcc CK_HSE>;
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assigned-clock-rates = <24000000>;
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VDDE-supply = <&v1v8>;
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VDDIN-supply = <&v1v8>;
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reset-gpios = <&gpioz 0 GPIO_ACTIVE_LOW>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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stmipi_0: endpoint {
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};
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};
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port@2 {
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reg = <2>;
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stmipi_2: endpoint {
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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pclk-sample = <0>;
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remote-endpoint = <&dcmi_0>;
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};
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};
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};
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};
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hdmi-transmitter@3d {
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compatible = "adi,adv7513";
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reg = <0x3d>, <0x4d>, <0x2d>, <0x5d>;
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