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phy: rockchip: usbdp: Factor out lane_mux_sel setup

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Avoid describing the USB+DP lane_mux_sel logic twice by introducing
a helper function to reduce code duplication.

Tested-by: Igor Paunovic <royalnet026@gmail.com> # Orange Pi 5 Plus
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Link: https://patch.msgid.link/20260915-rockchip-usbdp-cleanup-part2-v15-4-8d507cb1174f@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Sebastian Reichel 2026-09-15 17:06:07 +02:00 committed by Vinod Koul
parent 4d8349799c
commit cc492941f8
1 changed files with 40 additions and 41 deletions
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81
drivers/phy/rockchip/phy-rockchip-usbdp.c
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@ -581,6 +581,42 @@ static void rk_udphy_mode_set(struct rk_udphy *udphy, u8 mode)
udphy->mode = mode;
}
static void rk_udphy_set_typec_state(struct rk_udphy *udphy, unsigned long state)
{
u8 mode;
switch (state) {
case TYPEC_DP_STATE_C:
case TYPEC_DP_STATE_E:
udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
mode = UDPHY_MODE_DP;
udphy->dp_lanes = 4;
break;
case TYPEC_DP_STATE_D:
default:
if (udphy->flip) {
udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;
} else {
udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
}
mode = UDPHY_MODE_DP_USB;
udphy->dp_lanes = 2;
break;
}
rk_udphy_mode_set(udphy, mode);
}
static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
{
if (udphy->flip) {
@ -588,10 +624,6 @@ static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
udphy->dp_lane_sel[1] = 1;
udphy->dp_lane_sel[2] = 3;
udphy->dp_lane_sel[3] = 2;
udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;
udphy->dp_aux_dout_sel = PHY_AUX_DP_DATA_POL_INVERT;
udphy->dp_aux_din_sel = PHY_AUX_DP_DATA_POL_INVERT;
gpiod_set_value_cansleep(udphy->sbu1_dc_gpio, 1);
@ -601,18 +633,14 @@ static void rk_udphy_set_typec_default_mapping(struct rk_udphy *udphy)
udphy->dp_lane_sel[1] = 3;
udphy->dp_lane_sel[2] = 1;
udphy->dp_lane_sel[3] = 0;
udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
udphy->dp_aux_dout_sel = PHY_AUX_DP_DATA_POL_NORMAL;
udphy->dp_aux_din_sel = PHY_AUX_DP_DATA_POL_NORMAL;
gpiod_set_value_cansleep(udphy->sbu1_dc_gpio, 0);
gpiod_set_value_cansleep(udphy->sbu2_dc_gpio, 1);
}
rk_udphy_mode_set(udphy, UDPHY_MODE_DP_USB);
udphy->dp_lanes = 2;
/* default to USB3 + DP as 4 lane USB is not supported */
rk_udphy_set_typec_state(udphy, TYPEC_DP_STATE_D);
}
static int rk_udphy_orien_sw_set(struct typec_switch_dev *sw,
@ -1268,7 +1296,6 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
struct typec_mux_state *state)
{
struct rk_udphy *udphy = typec_mux_get_drvdata(mux);
u8 mode;
/*
* Ignore mux events not involving DP AltMode, because
@ -1280,38 +1307,10 @@ static int rk_udphy_typec_mux_set(struct typec_mux_dev *mux,
mutex_lock(&udphy->mutex);
switch (state->mode) {
case TYPEC_DP_STATE_C:
case TYPEC_DP_STATE_E:
udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
mode = UDPHY_MODE_DP;
udphy->dp_lanes = 4;
break;
case TYPEC_DP_STATE_D:
default:
if (udphy->flip) {
udphy->lane_mux_sel[0] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_USB;
} else {
udphy->lane_mux_sel[0] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[1] = PHY_LANE_MUX_USB;
udphy->lane_mux_sel[2] = PHY_LANE_MUX_DP;
udphy->lane_mux_sel[3] = PHY_LANE_MUX_DP;
}
mode = UDPHY_MODE_DP_USB;
udphy->dp_lanes = 2;
break;
}
rk_udphy_mode_set(udphy, mode);
rk_udphy_set_typec_state(udphy, state->mode);
mutex_unlock(&udphy->mutex);
return 0;
}