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iio: adc: versal-sysmon: add oversampling support
Add support for reading and writing the oversampling ratio through the IIO oversampling_ratio attribute. The hardware supports averaging 2, 4, 8, or 16 samples, plus a ratio of 1 (no averaging). Temperature and supply channels share oversampling configuration at the type level (all temperature channels share one ratio, all supply channels share another), exposed through info_mask_shared_by_type. The hardware encoding uses sample_count / 2 in a 4-bit field within the CONFIG register. Per-channel averaging enable registers must also be updated to activate or deactivate averaging. Signed-off-by: Salih Erim <salih.erim@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Salih Erim
Jonathan Cameron
parent
c7f7eb1063
commit
cbfd04ca56
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@ -28,6 +28,12 @@
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#include "versal-sysmon.h"
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/*
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* Oversampling ratio values exposed to userspace via IIO.
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* Actual number of samples averaged: 1=none, 2=2x, 4=4x, 8=8x, 16=16x.
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*/
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static const int sysmon_oversampling_avail[] = { 1, 2, 4, 8, 16 };
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/* TEMP hysteresis mode bit in SYSMON_TEMP_EV_CFG */
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#define SYSMON_TEMP_HYST_MASK BIT(1)
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@ -42,7 +48,11 @@
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.address = _address, \
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.channel = _chan, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_type = \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
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.info_mask_shared_by_type_available = \
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
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.datasheet_name = _name, \
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}
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@ -166,6 +176,12 @@ static int sysmon_read_raw(struct iio_dev *indio_dev,
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guard(mutex)(&sysmon->lock);
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if (mask == IIO_CHAN_INFO_OVERSAMPLING_RATIO) {
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*val = (chan->type == IIO_TEMP) ? sysmon->temp_oversampling :
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sysmon->supply_oversampling;
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return IIO_VAL_INT;
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}
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switch (chan->type) {
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case IIO_TEMP:
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if (mask == IIO_CHAN_INFO_SCALE) {
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@ -465,6 +481,132 @@ static int sysmon_write_event_value(struct iio_dev *indio_dev,
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}
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}
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static int sysmon_set_avg_enable(struct sysmon *sysmon,
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u32 base, u32 count, u32 val)
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{
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struct regmap *map = sysmon->regmap;
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int ret;
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for (unsigned int i = 0; i < count; i++) {
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ret = regmap_write(map, base + i * SYSMON_REG_STRIDE, val);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int sysmon_osr_write_temp(struct sysmon *sysmon, unsigned int val)
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{
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/*
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* HW register encoding is sample_count / 2:
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* 0=none, 1=2x, 2=4x, 4=8x, 8=16x (not log2-based).
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*/
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unsigned int hw_val = val >> 1;
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unsigned int readback;
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int ret;
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ret = regmap_update_bits(sysmon->regmap, SYSMON_CONFIG,
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SYSMON_CONFIG_TEMP_SAT_OSR,
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FIELD_PREP(SYSMON_CONFIG_TEMP_SAT_OSR, hw_val));
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if (ret)
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return ret;
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/*
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* Readback fence: the SysMon CONFIG register resides in the
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* PMC domain behind the NoC. A posted write may not reach the
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* hardware before the next MMIO access. Reading the register
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* back forces the interconnect to complete the write, preventing
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* a bus hang on the subsequent access.
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*/
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regmap_read(sysmon->regmap, SYSMON_CONFIG, &readback);
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return sysmon_set_avg_enable(sysmon, SYSMON_TEMP_EN_AVG_BASE,
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SYSMON_TEMP_EN_AVG_COUNT,
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hw_val ? ~0 : 0);
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}
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static int sysmon_osr_write_supply(struct sysmon *sysmon, unsigned int val)
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{
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/* HW encoding: sample_count / 2 (see sysmon_osr_write_temp) */
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unsigned int hw_val = val >> 1;
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unsigned int readback;
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int ret;
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ret = regmap_update_bits(sysmon->regmap, SYSMON_CONFIG,
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SYSMON_CONFIG_SUPPLY_OSR,
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FIELD_PREP(SYSMON_CONFIG_SUPPLY_OSR, hw_val));
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if (ret)
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return ret;
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/* Readback fence -- see sysmon_osr_write_temp for details */
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regmap_read(sysmon->regmap, SYSMON_CONFIG, &readback);
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return sysmon_set_avg_enable(sysmon, SYSMON_SUPPLY_EN_AVG_BASE,
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SYSMON_SUPPLY_EN_AVG_COUNT,
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hw_val ? ~0 : 0);
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}
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static int sysmon_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct sysmon *sysmon = iio_priv(indio_dev);
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unsigned int i;
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int ret;
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if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO)
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return -EINVAL;
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for (i = 0; i < ARRAY_SIZE(sysmon_oversampling_avail); i++) {
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if (val == sysmon_oversampling_avail[i])
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break;
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}
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if (i == ARRAY_SIZE(sysmon_oversampling_avail))
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return -EINVAL;
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guard(mutex)(&sysmon->lock);
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if (chan->type == IIO_TEMP) {
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ret = sysmon_osr_write_temp(sysmon, val);
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if (ret)
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return ret;
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sysmon->temp_oversampling = val;
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} else {
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ret = sysmon_osr_write_supply(sysmon, val);
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if (ret)
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return ret;
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sysmon->supply_oversampling = val;
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}
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return 0;
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}
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static int sysmon_write_raw_get_fmt(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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long mask)
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{
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if (mask == IIO_CHAN_INFO_OVERSAMPLING_RATIO)
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return IIO_VAL_INT;
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return -EINVAL;
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}
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static int sysmon_read_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type,
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int *length, long mask)
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{
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if (mask != IIO_CHAN_INFO_OVERSAMPLING_RATIO)
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return -EINVAL;
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*vals = sysmon_oversampling_avail;
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*type = IIO_VAL_INT;
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*length = ARRAY_SIZE(sysmon_oversampling_avail);
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return IIO_AVAIL_LIST;
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}
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static int sysmon_read_label(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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char *label)
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@ -477,6 +619,9 @@ static int sysmon_read_label(struct iio_dev *indio_dev,
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static const struct iio_info sysmon_iio_info = {
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.read_raw = sysmon_read_raw,
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.write_raw = sysmon_write_raw,
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.write_raw_get_fmt = sysmon_write_raw_get_fmt,
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.read_avail = sysmon_read_avail,
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.read_label = sysmon_read_label,
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.read_event_config = sysmon_read_event_config,
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.write_event_config = sysmon_write_event_config,
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@ -768,6 +913,10 @@ static int sysmon_parse_fw(struct iio_dev *indio_dev, struct device *dev, int ir
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.indexed = 1,
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.address = reg,
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
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.info_mask_shared_by_type =
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
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.info_mask_shared_by_type_available =
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
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.event_spec = irq > 0 ?
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sysmon_supply_events : NULL,
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.num_event_specs = irq > 0 ?
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@ -799,7 +948,11 @@ static int sysmon_parse_fw(struct iio_dev *indio_dev, struct device *dev, int ir
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.address = SYSMON_TEMP_SAT_BASE +
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(reg - 1) * SYSMON_REG_STRIDE,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
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.info_mask_shared_by_type =
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BIT(IIO_CHAN_INFO_SCALE) |
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
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.info_mask_shared_by_type_available =
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BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
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.datasheet_name = label,
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};
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}
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@ -846,6 +999,8 @@ int devm_versal_sysmon_core_probe(struct device *dev, struct regmap *regmap)
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sysmon = iio_priv(indio_dev);
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sysmon->regmap = regmap;
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sysmon->temp_oversampling = 1;
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sysmon->supply_oversampling = 1;
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ret = devm_mutex_init(dev, &sysmon->lock);
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if (ret)
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@ -23,11 +23,13 @@ struct regmap;
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#define SYSMON_IMR 0x0048
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#define SYSMON_IER 0x004C
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#define SYSMON_IDR 0x0050
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#define SYSMON_CONFIG 0x0100
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#define SYSMON_TEMP_MAX 0x1030
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#define SYSMON_TEMP_MIN 0x1034
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#define SYSMON_SUPPLY_BASE 0x1040
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#define SYSMON_ALARM_FLAG 0x1018
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#define SYSMON_ALARM_REG 0x1940
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#define SYSMON_SUPPLY_EN_AVG_BASE 0x1958
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#define SYSMON_TEMP_TH_LOW 0x1970
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#define SYSMON_TEMP_TH_UP 0x1974
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#define SYSMON_SUPPLY_TH_LOW 0x1980
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@ -37,6 +39,7 @@ struct regmap;
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#define SYSMON_TEMP_MAX_MAX 0x1F90
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#define SYSMON_STATUS_RESET 0x1F94
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#define SYSMON_TEMP_SAT_BASE 0x1FAC
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#define SYSMON_TEMP_EN_AVG_BASE 0x24B4
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#define SYSMON_MAX_REG 0x24C0
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/* NPI unlock value written to SYSMON_NPI_LOCK */
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@ -53,6 +56,16 @@ struct regmap;
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/* ISR/IMR temperature alarm mask (bit 9) */
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#define SYSMON_TEMP_INTR_MASK BIT(9)
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/* SYSMON_CONFIG: supply oversampling ratio */
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#define SYSMON_CONFIG_SUPPLY_OSR GENMASK(17, 14)
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/* SYSMON_CONFIG: temperature satellite oversampling ratio */
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#define SYSMON_CONFIG_TEMP_SAT_OSR GENMASK(27, 24)
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/* Per-channel averaging enable register counts */
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#define SYSMON_SUPPLY_EN_AVG_COUNT 5
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#define SYSMON_TEMP_EN_AVG_COUNT 2
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/* Supply voltage conversion register fields */
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#define SYSMON_MANTISSA_MASK GENMASK(15, 0)
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#define SYSMON_FMT_MASK BIT(16)
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@ -77,6 +90,8 @@ struct regmap;
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* @temp_mask: temperature interrupt configuration mask
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* @temp_hysteresis: cached DEVICE_TEMP hysteresis in millicelsius
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* @sysmon_unmask_work: re-enables events after alarm condition clears
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* @temp_oversampling: current temp oversampling ratio
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* @supply_oversampling: current supply oversampling ratio
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*/
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struct sysmon {
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struct regmap *regmap;
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@ -96,6 +111,8 @@ struct sysmon {
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unsigned int temp_mask;
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int temp_hysteresis;
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struct delayed_work sysmon_unmask_work;
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unsigned int temp_oversampling;
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unsigned int supply_oversampling;
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};
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int devm_versal_sysmon_core_probe(struct device *dev, struct regmap *regmap);
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