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net/mlx5: Expose disciplined_fr_counter through HCA capabilities in mlx5_ifc

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Introduce the `disciplined_fr_counter` capability bit to indicate that
the device’s free-running cycle counter is disciplined to real-time.

Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1752064867-16874-2-git-send-email-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Carolina Jubran 2025-07-09 15:41:06 +03:00 committed by Leon Romanovsky
parent c4f96972c3
commit cbe080f931
1 changed files with 2 additions and 1 deletions
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3
include/linux/mlx5/mlx5_ifc.h
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@ -1846,7 +1846,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 log_bf_reg_size[0x5];
u8 reserved_at_270[0x3];
u8 disciplined_fr_counter[0x1];
u8 reserved_at_271[0x2];
u8 qp_error_syndrome[0x1];
u8 reserved_at_274[0x2];
u8 lag_dct[0x2];