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amd-drm-fixes-7.2-2026-07-30:
amdgpu: - PM sysfs fix for APUs - Follow on pageflip timeout fix -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQgO5Idg2tXNTSZAr293/aFa7yZ2AUCamtmDQAKCRC93/aFa7yZ 2OS2APsGmwZzPkSiwg1+glS4jj11RLDxUC9idYCK/9GJb3cbbQD/eK+hUmgMIUBs HXxS3+8UjmXILQSykG6RzaBEjnNSnwQ= =Wr2/ -----END PGP SIGNATURE----- Merge tag 'amd-drm-fixes-7.2-2026-07-30' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes amd-drm-fixes-7.2-2026-07-30: amdgpu: - PM sysfs fix for APUs - Follow on pageflip timeout fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260730150018.801791-1-alexander.deucher@amd.com
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commit
cbad2668c2
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@ -9903,25 +9903,6 @@ static void remove_stream(struct amdgpu_device *adev,
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acrtc->enabled = false;
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}
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static void prepare_flip_isr(struct amdgpu_crtc *acrtc)
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{
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assert_spin_locked(&acrtc->base.dev->event_lock);
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WARN_ON(acrtc->event);
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acrtc->event = acrtc->base.state->event;
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/* Set the flip status */
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acrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
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/* Mark this event as consumed */
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acrtc->base.state->event = NULL;
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drm_dbg_state(acrtc->base.dev,
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"crtc:%d, pflip_stat:AMDGPU_FLIP_SUBMITTED\n",
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acrtc->crtc_id);
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}
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static void update_freesync_state_on_stream(
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struct amdgpu_display_manager *dm,
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struct dm_crtc_state *new_crtc_state,
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@ -10274,17 +10255,47 @@ static void dm_arm_vblank_event(struct amdgpu_crtc *acrtc,
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return;
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if (pflip_update) {
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drm_crtc_vblank_get(&acrtc->base);
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WARN_ON(acrtc->pflip_status != AMDGPU_FLIP_NONE);
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/* Arm flip completion handling and event delivery after programming. */
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prepare_flip_isr(acrtc);
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WARN_ON(acrtc->event);
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acrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
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acrtc->event = acrtc->base.state->event;
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acrtc->base.state->event = NULL;
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drm_dbg_state(acrtc->base.dev,
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"crtc:%d, pflip_stat:AMDGPU_FLIP_SUBMITTED\n",
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acrtc->crtc_id);
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} else if (cursor_update) {
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drm_crtc_vblank_get(&acrtc->base);
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acrtc->event = acrtc->base.state->event;
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acrtc->base.state->event = NULL;
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}
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}
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/**
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* dm_arm_vblank_event_pre_programming - Prepare for programming
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* @acrtc: The amdgpu CRTC to prepare
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* @acrtc_state: The new CRTC state
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* @pflip_update: Whether a page flip is being programmed
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* @cursor_update: Whether a cursor update is being programmed
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*
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* Grab a reference on the vblank counter if a page flip or cursor update is to
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* be programmed. Do this before programming so the HW is not in any
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* idle-optimized state (such as PSR).
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*/
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static void dm_arm_vblank_event_pre_programming(struct amdgpu_crtc *acrtc,
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struct dm_crtc_state *acrtc_state,
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bool pflip_update,
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bool cursor_update)
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{
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assert_spin_locked(&acrtc->base.dev->event_lock);
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if (!acrtc->base.state->event || acrtc_state->active_planes == 0)
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return;
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if (pflip_update || cursor_update)
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drm_crtc_vblank_get(&acrtc->base);
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}
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static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state,
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struct drm_device *dev,
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struct amdgpu_display_manager *dm,
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@ -10550,16 +10561,19 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_commit *state,
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}
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}
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/*
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* DCE depends on a combination of GRPH_FLIP, VLINE0, and VUPDATE for
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* event delivery. Only GRPH_FLIP handler can send pflip events, and it
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* only fires if HW latched to the flip. Maintain legacy behavior by
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* arming event before programming.
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*/
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if (amdgpu_ip_version(dm->adev, DCE_HWIP, 0) == 0) {
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scoped_guard(spinlock_irqsave, &pcrtc->dev->event_lock) {
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scoped_guard(spinlock_irqsave, &pcrtc->dev->event_lock) {
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dm_arm_vblank_event_pre_programming(acrtc_attach, acrtc_state,
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pflip_present,
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cursor_update);
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/*
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* DCE depends on a combination of GRPH_FLIP, VLINE0, and
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* VUPDATE for event delivery. Only GRPH_FLIP handler can send
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* pflip events, and it only fires if HW latched to the flip.
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* Maintain legacy behavior by arming event before programming.
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*/
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if (amdgpu_ip_version(dm->adev, DCE_HWIP, 0) == 0) {
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dm_arm_vblank_event(acrtc_attach, acrtc_state,
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pflip_present, cursor_update);
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pflip_present, cursor_update);
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}
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}
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@ -1183,6 +1183,13 @@ int amdgpu_dpm_dispatch_task(struct amdgpu_device *adev,
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return ret;
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}
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static bool amdgpu_dpm_is_pp_table_allowed(struct amdgpu_device *adev)
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{
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return !amdgpu_sriov_vf(adev) &&
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!(adev->flags & AMD_IS_APU) &&
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!adev->scpm_enabled;
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}
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int amdgpu_dpm_get_pp_table(struct amdgpu_device *adev, char *table,
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size_t size)
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{
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@ -1193,7 +1200,8 @@ int amdgpu_dpm_get_pp_table(struct amdgpu_device *adev, char *table,
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if ((!table && size) || (table && !size))
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return -EINVAL;
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if (amdgpu_sriov_vf(adev) || !pp_funcs->get_pp_table || adev->scpm_enabled)
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if (!amdgpu_dpm_is_pp_table_allowed(adev) ||
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!pp_funcs->get_pp_table)
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return -EOPNOTSUPP;
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mutex_lock(&adev->pm.mutex);
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@ -1717,7 +1725,8 @@ int amdgpu_dpm_set_pp_table(struct amdgpu_device *adev,
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if (!buf || !size)
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return -EINVAL;
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if (amdgpu_sriov_vf(adev) || !pp_funcs->set_pp_table || adev->scpm_enabled)
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if (!amdgpu_dpm_is_pp_table_allowed(adev) ||
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!pp_funcs->set_pp_table)
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return -EOPNOTSUPP;
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mutex_lock(&adev->pm.mutex);
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