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dt-bindings: media: Add qcom,qcm2290-camss
Add bindings for qcom,qcm2290-camss in order to support the camera subsystem found in the Qualcomm Robotics RB1 Platform (QRB2210). Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bod: reordered patch title to dt-bindings: media] Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
This commit is contained in:
Loic Poulain
Mauro Carvalho Chehab
parent
57429b0fdd
commit
cba308979b
243
Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml
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243
Documentation/devicetree/bindings/media/qcom,qcm2290-camss.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/qcom,qcm2290-camss.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QCM2290 Camera Subsystem (CAMSS)
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maintainers:
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- Loic Poulain <loic.poulain@oss.qualcomm.com>
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description:
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The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
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properties:
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compatible:
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const: qcom,qcm2290-camss
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reg:
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maxItems: 9
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reg-names:
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items:
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- const: top
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- const: csid0
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- const: csid1
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- const: csiphy0
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- const: csiphy1
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- const: csitpg0
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- const: csitpg1
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- const: vfe0
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- const: vfe1
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clocks:
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maxItems: 15
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clock-names:
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items:
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- const: ahb
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- const: axi
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- const: camnoc_nrt_axi
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- const: camnoc_rt_axi
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- const: csi0
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- const: csi1
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- const: csiphy0
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- const: csiphy0_timer
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- const: csiphy1
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- const: csiphy1_timer
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- const: top_ahb
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- const: vfe0
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- const: vfe0_cphy_rx
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- const: vfe1
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- const: vfe1_cphy_rx
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interrupts:
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maxItems: 8
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interrupt-names:
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items:
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- const: csid0
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- const: csid1
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- const: csiphy0
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- const: csiphy1
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- const: csitpg0
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- const: csitpg1
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- const: vfe0
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- const: vfe1
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interconnects:
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maxItems: 3
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interconnect-names:
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items:
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- const: ahb
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- const: hf_mnoc
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- const: sf_mnoc
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iommus:
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maxItems: 4
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power-domains:
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items:
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- description: GDSC CAMSS Block, Global Distributed Switch Controller.
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vdd-csiphy-1p2-supply:
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description:
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Phandle to a 1.2V regulator supply to CSI PHYs.
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vdd-csiphy-1p8-supply:
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description:
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Phandle to 1.8V regulator supply to CSI PHYs pll block.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description:
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CSI input ports.
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patternProperties:
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"^port@[0-3]+$":
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from a CSIPHY.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- data-lanes
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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- interrupt-names
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- interconnects
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- interconnect-names
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- iommus
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- power-domains
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- vdd-csiphy-1p2-supply
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- vdd-csiphy-1p8-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-qcm2290.h>
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#include <dt-bindings/interconnect/qcom,rpm-icc.h>
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#include <dt-bindings/interconnect/qcom,qcm2290.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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camss: camss@5c6e000 {
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compatible = "qcom,qcm2290-camss";
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reg = <0x0 0x5c11000 0x0 0x1000>,
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<0x0 0x5c6e000 0x0 0x1000>,
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<0x0 0x5c75000 0x0 0x1000>,
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<0x0 0x5c52000 0x0 0x1000>,
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<0x0 0x5c53000 0x0 0x1000>,
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<0x0 0x5c66000 0x0 0x400>,
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<0x0 0x5c68000 0x0 0x400>,
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<0x0 0x5c6f000 0x0 0x4000>,
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<0x0 0x5c76000 0x0 0x4000>;
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reg-names = "top",
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"csid0",
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"csid1",
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"csiphy0",
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"csiphy1",
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"csitpg0",
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"csitpg1",
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"vfe0",
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"vfe1";
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clocks = <&gcc GCC_CAMERA_AHB_CLK>,
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<&gcc GCC_CAMSS_AXI_CLK>,
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<&gcc GCC_CAMSS_NRT_AXI_CLK>,
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<&gcc GCC_CAMSS_RT_AXI_CLK>,
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<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
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<&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
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<&gcc GCC_CAMSS_CPHY_0_CLK>,
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<&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
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<&gcc GCC_CAMSS_CPHY_1_CLK>,
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<&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
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<&gcc GCC_CAMSS_TOP_AHB_CLK>,
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<&gcc GCC_CAMSS_TFE_0_CLK>,
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<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
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<&gcc GCC_CAMSS_TFE_1_CLK>,
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<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>;
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clock-names = "ahb",
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"axi",
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"camnoc_nrt_axi",
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"camnoc_rt_axi",
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"csi0",
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"csi1",
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"csiphy0",
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"csiphy0_timer",
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"csiphy1",
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"csiphy1_timer",
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"top_ahb",
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"vfe0",
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"vfe0_cphy_rx",
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"vfe1",
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"vfe1_cphy_rx";
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interrupts = <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 72 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 73 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 310 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 211 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "csid0",
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"csid1",
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"csiphy0",
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"csiphy1",
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"csitpg0",
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"csitpg1",
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"vfe0",
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"vfe1";
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interconnects = <&bimc MASTER_APPSS_PROC RPM_ACTIVE_TAG
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&config_noc SLAVE_CAMERA_CFG RPM_ACTIVE_TAG>,
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<&mmrt_virt MASTER_CAMNOC_HF RPM_ALWAYS_TAG
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&bimc SLAVE_EBI1 RPM_ALWAYS_TAG>,
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<&mmnrt_virt MASTER_CAMNOC_SF RPM_ALWAYS_TAG
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&bimc SLAVE_EBI1 RPM_ALWAYS_TAG>;
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interconnect-names = "ahb",
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"hf_mnoc",
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"sf_mnoc";
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iommus = <&apps_smmu 0x400 0x0>,
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<&apps_smmu 0x800 0x0>,
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<&apps_smmu 0x820 0x0>,
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<&apps_smmu 0x840 0x0>;
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power-domains = <&gcc GCC_CAMSS_TOP_GDSC>;
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vdd-csiphy-1p2-supply = <&pm4125_l5>;
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vdd-csiphy-1p8-supply = <&pm4125_l13>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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