github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-03 12:03:54 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hosts

Browse Source 
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU.
The ref clock is already being driven upstream through some of the
branches.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521-topic-8150_pcie_drop_clocks-v1-3-3d42e84f6453@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Konrad Dybcio 2025-05-21 15:38:12 +02:00 committed by Bjorn Andersson
parent 38d0b804b9
commit cb9ce20ebb
1 changed files with 8 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
arch/arm64/boot/dts/qcom/sc8180x.dtsi
View File

@ -1750,17 +1750,13 @@ pcie0: pcie@1c00000 {
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_AXI_CLK>,
<&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_0_CLKREF_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
<&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"ref",
"tbu";
"slave_q2a";
assigned-clocks = <&gcc GCC_PCIE_0_AUX_CLK>;
assigned-clock-rates = <19200000>;
@ -1873,17 +1869,13 @@ pcie3: pcie@1c08000 {
<&gcc GCC_PCIE_3_CFG_AHB_CLK>,
<&gcc GCC_PCIE_3_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_3_SLV_AXI_CLK>,
<&gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_3_CLKREF_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
<&gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"ref",
"tbu";
"slave_q2a";
assigned-clocks = <&gcc GCC_PCIE_3_AUX_CLK>;
assigned-clock-rates = <19200000>;
@ -1997,17 +1989,13 @@ pcie1: pcie@1c10000 {
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
<&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_1_CLKREF_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"ref",
"tbu";
"slave_q2a";
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
assigned-clock-rates = <19200000>;
@ -2121,17 +2109,13 @@ pcie2: pcie@1c18000 {
<&gcc GCC_PCIE_2_CFG_AHB_CLK>,
<&gcc GCC_PCIE_2_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_2_SLV_AXI_CLK>,
<&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>,
<&gcc GCC_PCIE_2_CLKREF_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>;
<&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>;
clock-names = "pipe",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"ref",
"tbu";
"slave_q2a";
assigned-clocks = <&gcc GCC_PCIE_2_AUX_CLK>;
assigned-clock-rates = <19200000>;