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dt-bindings: riscv: Add SiFive vendor extensions description

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Add description for SiFive vendor extensions "xsfcflushdlone",
"xsfpgflushdlone" and "xsfcease". This is used in the SBI
implementation [1].

Link: https://lore.kernel.org/opensbi/20250708074940.10904-1-nick.hu@sifive.com/ [1]
Signed-off-by: Nick Hu <nick.hu@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Nick Hu 2025-08-01 15:01:12 +08:00 committed by Conor Dooley
parent 8f5ae30d69
commit cb69daf085
1 changed files with 18 additions and 0 deletions
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18
Documentation/devicetree/bindings/riscv/extensions.yaml
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@ -663,6 +663,24 @@ properties:
https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
# SiFive
- const: xsfcease
description:
SiFive CEASE Instruction Extensions Specification.
See more details in
https://www.sifive.com/document-file/freedom-u740-c000-manual
- const: xsfcflushdlone
description:
SiFive L1D Cache Flush Instruction Extensions Specification.
See more details in
https://www.sifive.com/document-file/freedom-u740-c000-manual
- const: xsfpgflushdlone
description:
SiFive PGFLUSH Instruction Extensions for the power management. The
CPU will flush the L1D and enter the cease state after executing
the instruction.
- const: xsfvqmaccdod
description:
SiFive Int8 Matrix Multiplication Extensions Specification.