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drm/amdgpu: handle GDS and SPM without a VM fence

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If we end up emitting a VM fence keep GDS and SPM
associated with that fence.  If not, emit them as
part of the IB fence.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2026-06-05 18:06:15 -04:00
parent 54a118f1d7
commit cb1e657cca
3 changed files with 47 additions and 17 deletions
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14
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
View File

@ -131,6 +131,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
struct amdgpu_fence *af; struct amdgpu_fence *af;
struct amdgpu_fence *vm_af; struct amdgpu_fence *vm_af;
bool need_ctx_switch; bool need_ctx_switch;
bool emit_spm_needed = false;
bool emit_gds_needed = false;
struct amdgpu_vm *vm; struct amdgpu_vm *vm;
uint64_t fence_ctx; uint64_t fence_ctx;
uint32_t status = 0, alloc_size; uint32_t status = 0, alloc_size;
@ -220,7 +222,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
vm_af = job->hw_vm_fence; vm_af = job->hw_vm_fence;
/* VM sequence */ /* VM sequence */
vm_af->ib_wptr = ring->wptr; vm_af->ib_wptr = ring->wptr;
amdgpu_vm_flush(ring, job, need_pipe_sync); amdgpu_vm_flush(ring, job, need_pipe_sync, &emit_spm_needed,
&emit_gds_needed);
vm_af->ib_dw_size = vm_af->ib_dw_size =
amdgpu_ring_get_dw_distance(ring, vm_af->ib_wptr, ring->wptr); amdgpu_ring_get_dw_distance(ring, vm_af->ib_wptr, ring->wptr);
} }
@ -232,6 +235,15 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
if (ring->funcs->insert_start) if (ring->funcs->insert_start)
ring->funcs->insert_start(ring); ring->funcs->insert_start(ring);
if (emit_spm_needed)
adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid);
if (emit_gds_needed)
amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
job->gds_size, job->gws_base,
job->gws_size, job->oa_base,
job->oa_size);
if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync)
ring->funcs->emit_mem_sync(ring); ring->funcs->emit_mem_sync(ring);

46
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
View File

@ -766,18 +766,22 @@ bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring,
* @ring: ring to use for flush * @ring: ring to use for flush
* @job: related job * @job: related job
* @need_pipe_sync: is pipe sync needed * @need_pipe_sync: is pipe sync needed
* @emit_spm_needed: does the caller need to emit spm
* @emit_gds_needed: does the caller need to emit gds
* *
* Emit a VM flush when it is necessary. * Emit a VM flush when it is necessary.
*/ */
void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
bool need_pipe_sync) bool need_pipe_sync, bool *emit_spm_needed,
bool *emit_gds_needed)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
struct amdgpu_isolation *isolation = &adev->isolation[ring->xcp_id]; struct amdgpu_isolation *isolation = &adev->isolation[ring->xcp_id];
unsigned vmhub = ring->vm_hub; unsigned vmhub = ring->vm_hub;
struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
struct amdgpu_vmid *id = &id_mgr->ids[job->vmid]; struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];
bool spm_update_needed = job->spm_update_needed; bool spm_update_needed = adev->gfx.rlc.funcs->update_spm_vmid &&
job->spm_update_needed;
bool gds_switch_needed = ring->funcs->emit_gds_switch && bool gds_switch_needed = ring->funcs->emit_gds_switch &&
job->gds_switch_needed; job->gds_switch_needed;
bool vm_flush_needed = job->vm_needs_flush; bool vm_flush_needed = job->vm_needs_flush;
@ -785,6 +789,7 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
bool pasid_mapping_needed = false; bool pasid_mapping_needed = false;
struct dma_fence *fence = NULL; struct dma_fence *fence = NULL;
unsigned int patch = 0; unsigned int patch = 0;
bool emit_fence;
if (amdgpu_vmid_had_gpu_reset(adev, id)) { if (amdgpu_vmid_had_gpu_reset(adev, id)) {
gds_switch_needed = true; gds_switch_needed = true;
@ -811,6 +816,17 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
ring->funcs->emit_cleaner_shader && job->base.s_fence && ring->funcs->emit_cleaner_shader && job->base.s_fence &&
&job->base.s_fence->scheduled == isolation->spearhead; &job->base.s_fence->scheduled == isolation->spearhead;
emit_fence = vm_flush_needed || pasid_mapping_needed ||
cleaner_shader_needed;
*emit_spm_needed = spm_update_needed;
if (spm_update_needed && emit_fence)
*emit_spm_needed = false;
*emit_gds_needed = gds_switch_needed;
if (gds_switch_needed && emit_fence)
*emit_gds_needed = false;
if (!vm_flush_needed && !gds_switch_needed && !need_pipe_sync && if (!vm_flush_needed && !gds_switch_needed && !need_pipe_sync &&
!cleaner_shader_needed && !spm_update_needed) !cleaner_shader_needed && !spm_update_needed)
return; return;
@ -845,22 +861,22 @@ void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
if (pasid_mapping_needed) if (pasid_mapping_needed)
amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid); amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid) if (emit_fence) {
adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid); if (spm_update_needed)
adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid);
if (ring->funcs->emit_gds_switch && if (gds_switch_needed)
gds_switch_needed) { amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,
amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, job->gds_size, job->gws_base,
job->gds_size, job->gws_base, job->gws_size, job->oa_base,
job->gws_size, job->oa_base, job->oa_size);
job->oa_size);
amdgpu_fence_emit(ring, job->hw_vm_fence, 0);
fence = &job->hw_vm_fence->base;
/* get a ref for the job */
dma_fence_get(fence);
} }
amdgpu_fence_emit(ring, job->hw_vm_fence, 0);
fence = &job->hw_vm_fence->base;
/* get a ref for the job */
dma_fence_get(fence);
if (vm_flush_needed) { if (vm_flush_needed) {
mutex_lock(&id_mgr->lock); mutex_lock(&id_mgr->lock);
dma_fence_put(id->last_flush); dma_fence_put(id->last_flush);

4
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
View File

@ -511,7 +511,9 @@ int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm,
struct ww_acquire_ctx *ticket, struct ww_acquire_ctx *ticket,
int (*callback)(void *p, struct amdgpu_bo *bo), int (*callback)(void *p, struct amdgpu_bo *bo),
void *param); void *param);
void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_pipe_sync); void amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
bool need_pipe_sync, bool *emit_spm_needed,
bool *emit_gds_needed);
int amdgpu_vm_update_pdes(struct amdgpu_device *adev, int amdgpu_vm_update_pdes(struct amdgpu_device *adev,
struct amdgpu_vm *vm, bool immediate); struct amdgpu_vm *vm, bool immediate);
int amdgpu_vm_clear_freed(struct amdgpu_device *adev, int amdgpu_vm_clear_freed(struct amdgpu_device *adev,