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mt76: mt7915: add mt7915_mmio_probe() as a common probing function
Add mt7915_mmio_probe() which will be used for the upcoming devices. This is an intermediate patch to add mt7916 support. Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com> Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com> Co-developed-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com> Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Bo Jiao
Felix Fietkau
parent
71bb496ce1
commit
cacdd67812
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@ -1,7 +1,14 @@
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// SPDX-License-Identifier: ISC
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/* Copyright (C) 2020 MediaTek Inc. */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include "mt7915.h"
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#include "mac.h"
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#include "../trace.h"
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static u32 mt7915_reg_map_l1(struct mt7915_dev *dev, u32 addr)
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{
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@ -125,7 +132,9 @@ static u32 mt7915_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val)
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return dev->bus_ops->rmw(mdev, addr, mask, val);
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}
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int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq)
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static int mt7915_mmio_init(struct mt76_dev *mdev,
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void __iomem *mem_base,
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u32 device_id)
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{
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struct mt76_bus_ops *bus_ops;
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struct mt7915_dev *dev;
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@ -148,7 +157,229 @@ int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq)
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(mt76_rr(dev, MT_HW_REV) & 0xff);
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dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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return 0;
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}
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void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev,
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bool write_reg,
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u32 clear, u32 set)
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{
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struct mt76_dev *mdev = &dev->mt76;
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unsigned long flags;
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spin_lock_irqsave(&mdev->mmio.irq_lock, flags);
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mdev->mmio.irqmask &= ~clear;
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mdev->mmio.irqmask |= set;
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if (write_reg) {
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mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask);
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mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask);
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}
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spin_unlock_irqrestore(&mdev->mmio.irq_lock, flags);
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}
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static void mt7915_rx_poll_complete(struct mt76_dev *mdev,
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enum mt76_rxq_id q)
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{
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struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
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static const u32 rx_irq_mask[] = {
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[MT_RXQ_MAIN] = MT_INT_RX_DONE_DATA0,
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[MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1,
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[MT_RXQ_MCU] = MT_INT_RX_DONE_WM,
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[MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA,
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[MT_RXQ_EXT_WA] = MT_INT_RX_DONE_WA_EXT,
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};
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mt7915_irq_enable(dev, rx_irq_mask[q]);
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}
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/* TODO: support 2/4/6/8 MSI-X vectors */
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static void mt7915_irq_tasklet(struct tasklet_struct *t)
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{
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struct mt7915_dev *dev = from_tasklet(dev, t, irq_tasklet);
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u32 intr, intr1, mask;
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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if (dev->hif2)
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mt76_wr(dev, MT_INT1_MASK_CSR, 0);
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intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
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intr &= dev->mt76.mmio.irqmask;
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mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
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if (dev->hif2) {
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intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR);
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intr1 &= dev->mt76.mmio.irqmask;
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mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1);
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intr |= intr1;
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}
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trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
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mask = intr & MT_INT_RX_DONE_ALL;
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if (intr & MT_INT_TX_DONE_MCU)
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mask |= MT_INT_TX_DONE_MCU;
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mt7915_irq_disable(dev, mask);
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if (intr & MT_INT_TX_DONE_MCU)
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napi_schedule(&dev->mt76.tx_napi);
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if (intr & MT_INT_RX_DONE_DATA0)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
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if (intr & MT_INT_RX_DONE_DATA1)
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napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]);
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if (intr & MT_INT_RX_DONE_WM)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
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if (intr & MT_INT_RX_DONE_WA)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
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if (intr & MT_INT_RX_DONE_WA_EXT)
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napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]);
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if (intr & MT_INT_MCU_CMD) {
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u32 val = mt76_rr(dev, MT_MCU_CMD);
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mt76_wr(dev, MT_MCU_CMD, val);
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if (val & MT_MCU_CMD_ERROR_MASK) {
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dev->reset_state = val;
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ieee80211_queue_work(mt76_hw(dev), &dev->reset_work);
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wake_up(&dev->reset_wait);
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}
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}
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}
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static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
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{
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struct mt7915_dev *dev = dev_instance;
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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if (dev->hif2)
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mt76_wr(dev, MT_INT1_MASK_CSR, 0);
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if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
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return IRQ_NONE;
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tasklet_schedule(&dev->irq_tasklet);
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return IRQ_HANDLED;
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}
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int mt7915_mmio_probe(struct device *pdev,
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void __iomem *mem_base,
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u32 device_id,
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int irq, struct mt7915_hif *hif2)
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{
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static const struct mt76_driver_ops drv_ops = {
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/* txwi_size = txd size + txp size */
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.txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp),
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.drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
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.survey_flags = SURVEY_INFO_TIME_TX |
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SURVEY_INFO_TIME_RX |
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SURVEY_INFO_TIME_BSS_RX,
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.token_size = MT7915_TOKEN_SIZE,
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.tx_prepare_skb = mt7915_tx_prepare_skb,
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.tx_complete_skb = mt7915_tx_complete_skb,
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.rx_skb = mt7915_queue_rx_skb,
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.rx_check = mt7915_rx_check,
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.rx_poll_complete = mt7915_rx_poll_complete,
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.sta_ps = mt7915_sta_ps,
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.sta_add = mt7915_mac_sta_add,
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.sta_remove = mt7915_mac_sta_remove,
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.update_survey = mt7915_update_channel,
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};
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struct ieee80211_ops *ops;
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struct mt7915_dev *dev;
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struct mt76_dev *mdev;
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int ret;
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ops = devm_kmemdup(pdev, &mt7915_ops, sizeof(mt7915_ops), GFP_KERNEL);
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if (!ops)
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return -ENOMEM;
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mdev = mt76_alloc_device(pdev, sizeof(*dev), ops, &drv_ops);
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if (!mdev)
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return -ENOMEM;
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dev = container_of(mdev, struct mt7915_dev, mt76);
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ret = mt7915_mmio_init(mdev, mem_base, device_id);
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if (ret)
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goto error;
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tasklet_setup(&dev->irq_tasklet, mt7915_irq_tasklet);
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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/* master switch of PCIe tnterrupt enable */
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if (dev_is_pci(pdev))
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mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
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ret = devm_request_irq(mdev->dev, irq, mt7915_irq_handler,
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IRQF_SHARED, KBUILD_MODNAME, dev);
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if (ret)
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goto error;
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if (hif2) {
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dev->hif2 = hif2;
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mt76_wr(dev, MT_INT1_MASK_CSR, 0);
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/* master switch of PCIe tnterrupt enable */
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if (dev_is_pci(pdev))
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mt76_wr(dev, MT_PCIE1_MAC_INT_ENABLE, 0xff);
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ret = devm_request_irq(mdev->dev, dev->hif2->irq,
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mt7915_irq_handler, IRQF_SHARED,
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KBUILD_MODNAME "-hif", dev);
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if (ret) {
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put_device(dev->hif2->dev);
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goto free_irq;
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}
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}
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ret = mt7915_register_device(dev);
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if (ret)
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goto free_hif2_irq;
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return 0;
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free_hif2_irq:
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if (dev->hif2)
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devm_free_irq(mdev->dev, dev->hif2->irq, dev);
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free_irq:
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devm_free_irq(mdev->dev, irq, dev);
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error:
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mt76_free_device(&dev->mt76);
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return ret;
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}
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static int __init mt7915_init(void)
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{
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int ret;
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ret = pci_register_driver(&mt7915_hif_driver);
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if (ret)
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return ret;
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ret = pci_register_driver(&mt7915_pci_driver);
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if (ret)
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pci_unregister_driver(&mt7915_hif_driver);
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return ret;
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}
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static void __exit mt7915_exit(void)
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{
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pci_unregister_driver(&mt7915_pci_driver);
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pci_unregister_driver(&mt7915_hif_driver);
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}
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module_init(mt7915_init);
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module_exit(mt7915_exit);
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MODULE_LICENSE("Dual BSD/GPL");
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@ -353,7 +353,13 @@ static inline u8 mt7915_lmac_mapping(struct mt7915_dev *dev, u8 ac)
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extern const struct ieee80211_ops mt7915_ops;
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extern const struct mt76_testmode_ops mt7915_testmode_ops;
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extern struct pci_driver mt7915_pci_driver;
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extern struct pci_driver mt7915_hif_driver;
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int mt7915_mmio_probe(struct device *pdev,
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void __iomem *mem_base,
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u32 device_id,
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int irq, struct mt7915_hif *hif2);
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u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr);
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u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
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int mt7915_register_device(struct mt7915_dev *dev);
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@ -487,7 +493,6 @@ void mt7915_mac_work(struct work_struct *work);
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void mt7915_mac_reset_work(struct work_struct *work);
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void mt7915_mac_sta_rc_work(struct work_struct *work);
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void mt7915_mac_update_stats(struct mt7915_phy *phy);
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int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq);
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void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
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struct mt7915_sta *msta,
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u8 flowid);
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@ -26,27 +26,7 @@ static const struct pci_device_id mt7915_hif_device_table[] = {
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{ },
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};
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void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
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u32 clear, u32 set)
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{
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struct mt76_dev *mdev = &dev->mt76;
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unsigned long flags;
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spin_lock_irqsave(&mdev->mmio.irq_lock, flags);
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mdev->mmio.irqmask &= ~clear;
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mdev->mmio.irqmask |= set;
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if (write_reg) {
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mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask);
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mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask);
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}
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spin_unlock_irqrestore(&mdev->mmio.irq_lock, flags);
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}
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static struct mt7915_hif *
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mt7915_pci_get_hif2(struct mt7915_dev *dev)
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static struct mt7915_hif *mt7915_pci_get_hif2(u32 idx)
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{
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struct mt7915_hif *hif;
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u32 val;
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@ -56,7 +36,7 @@ mt7915_pci_get_hif2(struct mt7915_dev *dev)
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list_for_each_entry(hif, &hif_list, list) {
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val = readl(hif->regs + MT_PCIE_RECOG_ID);
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val &= MT_PCIE_RECOG_ID_MASK;
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if (val != dev->hif_idx)
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if (val != idx)
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continue;
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get_device(hif->dev);
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@ -78,123 +58,16 @@ static void mt7915_put_hif2(struct mt7915_hif *hif)
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put_device(hif->dev);
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}
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static void
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mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
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static struct mt7915_hif *mt7915_pci_init_hif2(struct pci_dev *pdev)
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{
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struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);
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static const u32 rx_irq_mask[] = {
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[MT_RXQ_MAIN] = MT_INT_RX_DONE_DATA0,
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[MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1,
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[MT_RXQ_MCU] = MT_INT_RX_DONE_WM,
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[MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA,
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[MT_RXQ_EXT_WA] = MT_INT_RX_DONE_WA_EXT,
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};
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mt7915_irq_enable(dev, rx_irq_mask[q]);
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}
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/* TODO: support 2/4/6/8 MSI-X vectors */
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static void mt7915_irq_tasklet(struct tasklet_struct *t)
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{
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struct mt7915_dev *dev = from_tasklet(dev, t, irq_tasklet);
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u32 intr, intr1, mask;
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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if (dev->hif2)
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mt76_wr(dev, MT_INT1_MASK_CSR, 0);
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intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
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intr &= dev->mt76.mmio.irqmask;
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mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
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if (dev->hif2) {
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intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR);
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intr1 &= dev->mt76.mmio.irqmask;
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mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1);
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intr |= intr1;
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}
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trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
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mask = intr & MT_INT_RX_DONE_ALL;
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if (intr & MT_INT_TX_DONE_MCU)
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mask |= MT_INT_TX_DONE_MCU;
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mt7915_irq_disable(dev, mask);
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if (intr & MT_INT_TX_DONE_MCU)
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napi_schedule(&dev->mt76.tx_napi);
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if (intr & MT_INT_RX_DONE_DATA0)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
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if (intr & MT_INT_RX_DONE_DATA1)
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napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]);
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if (intr & MT_INT_RX_DONE_WM)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
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if (intr & MT_INT_RX_DONE_WA)
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napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
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if (intr & MT_INT_RX_DONE_WA_EXT)
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napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]);
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if (intr & MT_INT_MCU_CMD) {
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u32 val = mt76_rr(dev, MT_MCU_CMD);
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mt76_wr(dev, MT_MCU_CMD, val);
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if (val & MT_MCU_CMD_ERROR_MASK) {
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dev->reset_state = val;
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ieee80211_queue_work(mt76_hw(dev), &dev->reset_work);
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wake_up(&dev->reset_wait);
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}
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}
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}
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static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance)
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{
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struct mt7915_dev *dev = dev_instance;
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mt76_wr(dev, MT_INT_MASK_CSR, 0);
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if (dev->hif2)
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mt76_wr(dev, MT_INT1_MASK_CSR, 0);
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if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
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return IRQ_NONE;
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|
||||
tasklet_schedule(&dev->irq_tasklet);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void mt7915_pci_init_hif2(struct mt7915_dev *dev)
|
||||
{
|
||||
struct mt7915_hif *hif;
|
||||
|
||||
dev->hif_idx = ++hif_idx;
|
||||
hif_idx++;
|
||||
if (!pci_get_device(PCI_VENDOR_ID_MEDIATEK, 0x7916, NULL))
|
||||
return;
|
||||
return NULL;
|
||||
|
||||
mt76_wr(dev, MT_PCIE_RECOG_ID, dev->hif_idx | MT_PCIE_RECOG_ID_SEM);
|
||||
writel(hif_idx | MT_PCIE_RECOG_ID_SEM,
|
||||
pcim_iomap_table(pdev)[0] + MT_PCIE_RECOG_ID);
|
||||
|
||||
hif = mt7915_pci_get_hif2(dev);
|
||||
if (!hif)
|
||||
return;
|
||||
|
||||
dev->hif2 = hif;
|
||||
|
||||
mt76_wr(dev, MT_INT1_MASK_CSR, 0);
|
||||
|
||||
if (devm_request_irq(dev->mt76.dev, hif->irq, mt7915_irq_handler,
|
||||
IRQF_SHARED, KBUILD_MODNAME "-hif", dev)) {
|
||||
mt7915_put_hif2(hif);
|
||||
hif = NULL;
|
||||
}
|
||||
|
||||
/* master switch of PCIe tnterrupt enable */
|
||||
mt76_wr(dev, MT_PCIE1_MAC_INT_ENABLE, 0xff);
|
||||
return mt7915_pci_get_hif2(hif_idx);
|
||||
}
|
||||
|
||||
static int mt7915_pci_hif2_probe(struct pci_dev *pdev)
|
||||
|
|
@ -219,26 +92,7 @@ static int mt7915_pci_hif2_probe(struct pci_dev *pdev)
|
|||
static int mt7915_pci_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *id)
|
||||
{
|
||||
static const struct mt76_driver_ops drv_ops = {
|
||||
/* txwi_size = txd size + txp size */
|
||||
.txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp),
|
||||
.drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
|
||||
.survey_flags = SURVEY_INFO_TIME_TX |
|
||||
SURVEY_INFO_TIME_RX |
|
||||
SURVEY_INFO_TIME_BSS_RX,
|
||||
.token_size = MT7915_TOKEN_SIZE,
|
||||
.tx_prepare_skb = mt7915_tx_prepare_skb,
|
||||
.tx_complete_skb = mt7915_tx_complete_skb,
|
||||
.rx_skb = mt7915_queue_rx_skb,
|
||||
.rx_check = mt7915_rx_check,
|
||||
.rx_poll_complete = mt7915_rx_poll_complete,
|
||||
.sta_ps = mt7915_sta_ps,
|
||||
.sta_add = mt7915_mac_sta_add,
|
||||
.sta_remove = mt7915_mac_sta_remove,
|
||||
.update_survey = mt7915_update_channel,
|
||||
};
|
||||
struct mt7915_dev *dev;
|
||||
struct mt76_dev *mdev;
|
||||
struct mt7915_hif *hif2;
|
||||
int ret;
|
||||
|
||||
ret = pcim_enable_device(pdev);
|
||||
|
|
@ -260,46 +114,18 @@ static int mt7915_pci_probe(struct pci_dev *pdev,
|
|||
if (id->device == 0x7916)
|
||||
return mt7915_pci_hif2_probe(pdev);
|
||||
|
||||
mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7915_ops,
|
||||
&drv_ops);
|
||||
if (!mdev)
|
||||
return -ENOMEM;
|
||||
|
||||
dev = container_of(mdev, struct mt7915_dev, mt76);
|
||||
|
||||
ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
|
||||
if (ret < 0)
|
||||
goto free;
|
||||
return ret;
|
||||
|
||||
ret = mt7915_mmio_init(mdev, pcim_iomap_table(pdev)[0], pdev->irq);
|
||||
if (ret)
|
||||
goto error;
|
||||
hif2 = mt7915_pci_init_hif2(pdev);
|
||||
|
||||
tasklet_setup(&dev->irq_tasklet, mt7915_irq_tasklet);
|
||||
ret = mt7915_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0],
|
||||
id->device, pdev->irq, hif2);
|
||||
if (!ret)
|
||||
return 0;
|
||||
|
||||
mt76_wr(dev, MT_INT_MASK_CSR, 0);
|
||||
|
||||
/* master switch of PCIe tnterrupt enable */
|
||||
mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
|
||||
|
||||
ret = devm_request_irq(mdev->dev, pdev->irq, mt7915_irq_handler,
|
||||
IRQF_SHARED, KBUILD_MODNAME, dev);
|
||||
if (ret)
|
||||
goto error;
|
||||
|
||||
mt7915_pci_init_hif2(dev);
|
||||
|
||||
ret = mt7915_register_device(dev);
|
||||
if (ret)
|
||||
goto free_irq;
|
||||
|
||||
return 0;
|
||||
free_irq:
|
||||
devm_free_irq(mdev->dev, pdev->irq, dev);
|
||||
error:
|
||||
pci_free_irq_vectors(pdev);
|
||||
free:
|
||||
mt76_free_device(&dev->mt76);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -322,47 +148,22 @@ static void mt7915_pci_remove(struct pci_dev *pdev)
|
|||
mt7915_unregister_device(dev);
|
||||
}
|
||||
|
||||
static struct pci_driver mt7915_hif_driver = {
|
||||
struct pci_driver mt7915_hif_driver = {
|
||||
.name = KBUILD_MODNAME "_hif",
|
||||
.id_table = mt7915_hif_device_table,
|
||||
.probe = mt7915_pci_probe,
|
||||
.remove = mt7915_hif_remove,
|
||||
};
|
||||
|
||||
static struct pci_driver mt7915_pci_driver = {
|
||||
struct pci_driver mt7915_pci_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = mt7915_pci_device_table,
|
||||
.probe = mt7915_pci_probe,
|
||||
.remove = mt7915_pci_remove,
|
||||
};
|
||||
|
||||
static int __init mt7915_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pci_register_driver(&mt7915_hif_driver);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = pci_register_driver(&mt7915_pci_driver);
|
||||
if (ret)
|
||||
pci_unregister_driver(&mt7915_hif_driver);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __exit mt7915_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&mt7915_pci_driver);
|
||||
pci_unregister_driver(&mt7915_hif_driver);
|
||||
}
|
||||
|
||||
module_init(mt7915_init);
|
||||
module_exit(mt7915_exit);
|
||||
|
||||
MODULE_DEVICE_TABLE(pci, mt7915_pci_device_table);
|
||||
MODULE_DEVICE_TABLE(pci, mt7915_hif_device_table);
|
||||
MODULE_FIRMWARE(MT7915_FIRMWARE_WA);
|
||||
MODULE_FIRMWARE(MT7915_FIRMWARE_WM);
|
||||
MODULE_FIRMWARE(MT7915_ROM_PATCH);
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user