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wifi: rtw89: 8922a: set RX gain along with set_channel operation
Set values of LNA, TIA and RPL gain compensation read from firmware file when channel is changed. Signed-off-by: Chung-Hsuan Hung <hsuan8331@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240105064228.36580-4-pkshih@realtek.com
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@ -600,6 +600,189 @@ static int rtw8922a_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map)
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return 0;
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}
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struct rtw8922a_bb_gain {
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u32 gain_g[BB_PATH_NUM_8922A];
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u32 gain_a[BB_PATH_NUM_8922A];
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u32 gain_g_mask;
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u32 gain_a_mask;
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};
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static const struct rtw89_reg_def rpl_comp_bw160[RTW89_BW20_SC_160M] = {
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{ .addr = 0x41E8, .mask = 0xFF00},
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{ .addr = 0x41E8, .mask = 0xFF0000},
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{ .addr = 0x41E8, .mask = 0xFF000000},
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{ .addr = 0x41EC, .mask = 0xFF},
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{ .addr = 0x41EC, .mask = 0xFF00},
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{ .addr = 0x41EC, .mask = 0xFF0000},
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{ .addr = 0x41EC, .mask = 0xFF000000},
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{ .addr = 0x41F0, .mask = 0xFF}
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};
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static const struct rtw89_reg_def rpl_comp_bw80[RTW89_BW20_SC_80M] = {
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{ .addr = 0x41F4, .mask = 0xFF},
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{ .addr = 0x41F4, .mask = 0xFF00},
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{ .addr = 0x41F4, .mask = 0xFF0000},
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{ .addr = 0x41F4, .mask = 0xFF000000}
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};
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static const struct rtw89_reg_def rpl_comp_bw40[RTW89_BW20_SC_40M] = {
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{ .addr = 0x41F0, .mask = 0xFF0000},
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{ .addr = 0x41F0, .mask = 0xFF000000}
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};
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static const struct rtw89_reg_def rpl_comp_bw20[RTW89_BW20_SC_20M] = {
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{ .addr = 0x41F0, .mask = 0xFF00}
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};
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static const struct rtw8922a_bb_gain bb_gain_lna[LNA_GAIN_NUM] = {
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{ .gain_g = {0x409c, 0x449c}, .gain_a = {0x406C, 0x446C},
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.gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
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{ .gain_g = {0x409c, 0x449c}, .gain_a = {0x406C, 0x446C},
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.gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
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{ .gain_g = {0x40a0, 0x44a0}, .gain_a = {0x4070, 0x4470},
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.gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
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{ .gain_g = {0x40a0, 0x44a0}, .gain_a = {0x4070, 0x4470},
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.gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
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{ .gain_g = {0x40a4, 0x44a4}, .gain_a = {0x4074, 0x4474},
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.gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
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{ .gain_g = {0x40a4, 0x44a4}, .gain_a = {0x4074, 0x4474},
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.gain_g_mask = 0xFF000000, .gain_a_mask = 0xFF0000},
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{ .gain_g = {0x40a8, 0x44a8}, .gain_a = {0x4078, 0x4478},
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.gain_g_mask = 0xFF00, .gain_a_mask = 0xFF},
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};
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static const struct rtw8922a_bb_gain bb_gain_tia[TIA_GAIN_NUM] = {
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{ .gain_g = {0x4054, 0x4454}, .gain_a = {0x4054, 0x4454},
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.gain_g_mask = 0x7FC0000, .gain_a_mask = 0x1FF},
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{ .gain_g = {0x4058, 0x4458}, .gain_a = {0x4054, 0x4454},
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.gain_g_mask = 0x1FF, .gain_a_mask = 0x3FE00 },
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};
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struct rtw8922a_bb_gain_bypass {
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u32 gain_g[BB_PATH_NUM_8922A];
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u32 gain_a[BB_PATH_NUM_8922A];
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u32 gain_mask_g;
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u32 gain_mask_a;
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};
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static void rtw8922a_set_rpl_gain(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_rf_path path,
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enum rtw89_phy_idx phy_idx)
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{
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const struct rtw89_phy_bb_gain_info_be *gain = &rtwdev->bb_gain.be;
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u8 gain_band = rtw89_subband_to_gain_band_be(chan->subband_type);
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u32 reg_path_ofst = 0;
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u32 mask;
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s32 val;
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u32 reg;
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int i;
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if (path == RF_PATH_B)
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reg_path_ofst = 0x400;
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for (i = 0; i < RTW89_BW20_SC_160M; i++) {
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reg = rpl_comp_bw160[i].addr | reg_path_ofst;
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mask = rpl_comp_bw160[i].mask;
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val = gain->rpl_ofst_160[gain_band][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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for (i = 0; i < RTW89_BW20_SC_80M; i++) {
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reg = rpl_comp_bw80[i].addr | reg_path_ofst;
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mask = rpl_comp_bw80[i].mask;
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val = gain->rpl_ofst_80[gain_band][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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for (i = 0; i < RTW89_BW20_SC_40M; i++) {
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reg = rpl_comp_bw40[i].addr | reg_path_ofst;
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mask = rpl_comp_bw40[i].mask;
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val = gain->rpl_ofst_40[gain_band][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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for (i = 0; i < RTW89_BW20_SC_20M; i++) {
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reg = rpl_comp_bw20[i].addr | reg_path_ofst;
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mask = rpl_comp_bw20[i].mask;
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val = gain->rpl_ofst_20[gain_band][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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}
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static void rtw8922a_set_lna_tia_gain(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_rf_path path,
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enum rtw89_phy_idx phy_idx)
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{
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const struct rtw89_phy_bb_gain_info_be *gain = &rtwdev->bb_gain.be;
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u8 gain_band = rtw89_subband_to_gain_band_be(chan->subband_type);
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enum rtw89_phy_bb_bw_be bw_type;
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s32 val;
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u32 reg;
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u32 mask;
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int i;
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bw_type = chan->band_width <= RTW89_CHANNEL_WIDTH_40 ?
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RTW89_BB_BW_20_40 : RTW89_BB_BW_80_160_320;
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for (i = 0; i < LNA_GAIN_NUM; i++) {
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if (chan->band_type == RTW89_BAND_2G) {
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reg = bb_gain_lna[i].gain_g[path];
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mask = bb_gain_lna[i].gain_g_mask;
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} else {
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reg = bb_gain_lna[i].gain_a[path];
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mask = bb_gain_lna[i].gain_a_mask;
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}
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val = gain->lna_gain[gain_band][bw_type][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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for (i = 0; i < TIA_GAIN_NUM; i++) {
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if (chan->band_type == RTW89_BAND_2G) {
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reg = bb_gain_tia[i].gain_g[path];
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mask = bb_gain_tia[i].gain_g_mask;
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} else {
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reg = bb_gain_tia[i].gain_a[path];
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mask = bb_gain_tia[i].gain_a_mask;
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}
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val = gain->tia_gain[gain_band][bw_type][path][i];
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rtw89_phy_write32_idx(rtwdev, reg, mask, val, phy_idx);
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}
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}
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static void rtw8922a_set_gain(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_rf_path path,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8922a_set_lna_tia_gain(rtwdev, chan, path, phy_idx);
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rtw8922a_set_rpl_gain(rtwdev, chan, path, phy_idx);
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}
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static void rtw8922a_ctrl_ch(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8922a_set_gain(rtwdev, chan, RF_PATH_A, phy_idx);
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rtw8922a_set_gain(rtwdev, chan, RF_PATH_B, phy_idx);
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}
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static void rtw8922a_set_channel_bb(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8922a_ctrl_ch(rtwdev, chan, phy_idx);
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}
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static void rtw8922a_set_channel(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_mac_idx mac_idx,
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enum rtw89_phy_idx phy_idx)
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{
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rtw8922a_set_channel_bb(rtwdev, chan, phy_idx);
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}
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#ifdef CONFIG_PM
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static const struct wiphy_wowlan_support rtw_wowlan_stub_8922a = {
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.flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
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@ -610,6 +793,7 @@ static const struct wiphy_wowlan_support rtw_wowlan_stub_8922a = {
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#endif
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static const struct rtw89_chip_ops rtw8922a_chip_ops = {
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.set_channel = rtw8922a_set_channel,
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.read_efuse = rtw8922a_read_efuse,
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.read_phycap = rtw8922a_read_phycap,
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.pwr_on_func = rtw8922a_pwr_on_func,
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