drm/amdgpu: Check RRMT status for JPEG v4.0.3

RRMT could get dynamically enabled/disabled by PSP firmware. Read the
status from register for reading RRMT status. For VFs, this is not
accessible, hence assume that it's always disabled for now.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-01-10 13:03:19 +05:30 committed by Alex Deucher
parent 485380f7fe
commit ca44922107
2 changed files with 13 additions and 2 deletions

View File

@ -92,6 +92,12 @@
*adev->jpeg.inst[inst_idx].dpg_sram_curr_addr++ = value; \
} while (0)
enum amdgpu_jpeg_caps {
AMDGPU_JPEG_RRMT_ENABLED,
};
#define AMDGPU_JPEG_CAPS(caps) BIT(AMDGPU_JPEG_##caps)
struct amdgpu_jpeg_reg{
unsigned jpeg_pitch[AMDGPU_MAX_JPEG_RINGS];
};
@ -130,6 +136,7 @@ struct amdgpu_jpeg {
uint8_t num_inst_per_aid;
bool indirect_sram;
uint32_t supported_reset;
uint32_t caps;
};
int amdgpu_jpeg_sw_init(struct amdgpu_device *adev);

View File

@ -61,8 +61,7 @@ static int amdgpu_ih_srcid_jpeg[] = {
static inline bool jpeg_v4_0_3_normalizn_reqd(struct amdgpu_device *adev)
{
return amdgpu_sriov_vf(adev) ||
(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4));
return (adev->jpeg.caps & AMDGPU_JPEG_CAPS(RRMT_ENABLED)) == 0;
}
/**
@ -331,6 +330,11 @@ static int jpeg_v4_0_3_hw_init(struct amdgpu_ip_block *ip_block)
}
}
} else {
/* This flag is not set for VF, assumed to be disabled always */
if (RREG32_SOC15(VCN, GET_INST(VCN, 0), regVCN_RRMT_CNTL) &
0x100)
adev->jpeg.caps |= AMDGPU_JPEG_CAPS(RRMT_ENABLED);
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
jpeg_inst = GET_INST(JPEG, i);