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synced 2026-05-23 06:31:58 +02:00
drm/i915/wm: reduce stack usage in skl_print_wm_changes()
When KMSAN is enabled, this function causes has a rather excessive stack usage: drivers/gpu/drm/i915/display/skl_watermark.c:2977:1: error: stack frame size (1432) exceeds limit (1408) in 'skl_compute_wm' [-Werror,-Wframe-larger-than] This is apparently all caused by the varargs calls to drm_dbg_kms(). Inlining this into skl_compute_wm() means that any function called by skl_compute_wm() has its own stack on top of that. Move the worst bit into a separate function marked as noinline_for_stack to limit that to the one code path that actually needs it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20250620113748.3869160-1-arnd@kernel.org Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Arnd Bergmann
Rodrigo Vivi
parent
c4c1a91530
commit
c9c325072b
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@ -2676,6 +2676,97 @@ static char enast(bool enable)
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return enable ? '*' : ' ';
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}
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static noinline_for_stack void
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skl_print_plane_changes(struct intel_display *display,
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struct intel_plane *plane,
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const struct skl_plane_wm *old_wm,
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const struct skl_plane_wm *new_wm)
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{
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm"
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" -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm\n",
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plane->base.base.id, plane->base.name,
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enast(old_wm->wm[0].enable), enast(old_wm->wm[1].enable),
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enast(old_wm->wm[2].enable), enast(old_wm->wm[3].enable),
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enast(old_wm->wm[4].enable), enast(old_wm->wm[5].enable),
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enast(old_wm->wm[6].enable), enast(old_wm->wm[7].enable),
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enast(old_wm->trans_wm.enable),
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enast(old_wm->sagv.wm0.enable),
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enast(old_wm->sagv.trans_wm.enable),
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enast(new_wm->wm[0].enable), enast(new_wm->wm[1].enable),
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enast(new_wm->wm[2].enable), enast(new_wm->wm[3].enable),
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enast(new_wm->wm[4].enable), enast(new_wm->wm[5].enable),
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enast(new_wm->wm[6].enable), enast(new_wm->wm[7].enable),
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enast(new_wm->trans_wm.enable),
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enast(new_wm->sagv.wm0.enable),
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enast(new_wm->sagv.trans_wm.enable));
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d"
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" -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d\n",
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plane->base.base.id, plane->base.name,
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enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].lines,
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enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].lines,
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enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].lines,
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enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].lines,
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enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].lines,
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enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].lines,
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enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].lines,
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enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].lines,
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enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.lines,
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enast(old_wm->sagv.wm0.ignore_lines), old_wm->sagv.wm0.lines,
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enast(old_wm->sagv.trans_wm.ignore_lines), old_wm->sagv.trans_wm.lines,
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enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].lines,
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enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].lines,
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enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].lines,
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enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].lines,
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enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].lines,
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enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].lines,
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enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].lines,
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enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].lines,
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enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.lines,
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enast(new_wm->sagv.wm0.ignore_lines), new_wm->sagv.wm0.lines,
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enast(new_wm->sagv.trans_wm.ignore_lines), new_wm->sagv.trans_wm.lines);
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
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" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
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plane->base.base.id, plane->base.name,
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old_wm->wm[0].blocks, old_wm->wm[1].blocks,
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old_wm->wm[2].blocks, old_wm->wm[3].blocks,
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old_wm->wm[4].blocks, old_wm->wm[5].blocks,
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old_wm->wm[6].blocks, old_wm->wm[7].blocks,
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old_wm->trans_wm.blocks,
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old_wm->sagv.wm0.blocks,
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old_wm->sagv.trans_wm.blocks,
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new_wm->wm[0].blocks, new_wm->wm[1].blocks,
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new_wm->wm[2].blocks, new_wm->wm[3].blocks,
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new_wm->wm[4].blocks, new_wm->wm[5].blocks,
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new_wm->wm[6].blocks, new_wm->wm[7].blocks,
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new_wm->trans_wm.blocks,
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new_wm->sagv.wm0.blocks,
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new_wm->sagv.trans_wm.blocks);
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
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" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
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plane->base.base.id, plane->base.name,
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old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc,
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old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc,
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old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc,
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old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc,
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old_wm->trans_wm.min_ddb_alloc,
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old_wm->sagv.wm0.min_ddb_alloc,
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old_wm->sagv.trans_wm.min_ddb_alloc,
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new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc,
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new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc,
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new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc,
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new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc,
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new_wm->trans_wm.min_ddb_alloc,
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new_wm->sagv.wm0.min_ddb_alloc,
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new_wm->sagv.trans_wm.min_ddb_alloc);
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}
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static void
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skl_print_wm_changes(struct intel_atomic_state *state)
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{
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@ -2705,7 +2796,6 @@ skl_print_wm_changes(struct intel_atomic_state *state)
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if (skl_ddb_entry_equal(old, new))
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continue;
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] ddb (%4d - %4d) -> (%4d - %4d), size %4d -> %4d\n",
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plane->base.base.id, plane->base.name,
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@ -2723,89 +2813,7 @@ skl_print_wm_changes(struct intel_atomic_state *state)
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if (skl_plane_wm_equals(display, old_wm, new_wm))
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continue;
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] level %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm"
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" -> %cwm0,%cwm1,%cwm2,%cwm3,%cwm4,%cwm5,%cwm6,%cwm7,%ctwm,%cswm,%cstwm\n",
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plane->base.base.id, plane->base.name,
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enast(old_wm->wm[0].enable), enast(old_wm->wm[1].enable),
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enast(old_wm->wm[2].enable), enast(old_wm->wm[3].enable),
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enast(old_wm->wm[4].enable), enast(old_wm->wm[5].enable),
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enast(old_wm->wm[6].enable), enast(old_wm->wm[7].enable),
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enast(old_wm->trans_wm.enable),
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enast(old_wm->sagv.wm0.enable),
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enast(old_wm->sagv.trans_wm.enable),
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enast(new_wm->wm[0].enable), enast(new_wm->wm[1].enable),
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enast(new_wm->wm[2].enable), enast(new_wm->wm[3].enable),
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enast(new_wm->wm[4].enable), enast(new_wm->wm[5].enable),
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enast(new_wm->wm[6].enable), enast(new_wm->wm[7].enable),
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enast(new_wm->trans_wm.enable),
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enast(new_wm->sagv.wm0.enable),
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enast(new_wm->sagv.trans_wm.enable));
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] lines %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d"
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" -> %c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%3d,%c%4d\n",
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plane->base.base.id, plane->base.name,
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enast(old_wm->wm[0].ignore_lines), old_wm->wm[0].lines,
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enast(old_wm->wm[1].ignore_lines), old_wm->wm[1].lines,
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enast(old_wm->wm[2].ignore_lines), old_wm->wm[2].lines,
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enast(old_wm->wm[3].ignore_lines), old_wm->wm[3].lines,
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enast(old_wm->wm[4].ignore_lines), old_wm->wm[4].lines,
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enast(old_wm->wm[5].ignore_lines), old_wm->wm[5].lines,
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enast(old_wm->wm[6].ignore_lines), old_wm->wm[6].lines,
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enast(old_wm->wm[7].ignore_lines), old_wm->wm[7].lines,
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enast(old_wm->trans_wm.ignore_lines), old_wm->trans_wm.lines,
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enast(old_wm->sagv.wm0.ignore_lines), old_wm->sagv.wm0.lines,
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enast(old_wm->sagv.trans_wm.ignore_lines), old_wm->sagv.trans_wm.lines,
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enast(new_wm->wm[0].ignore_lines), new_wm->wm[0].lines,
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enast(new_wm->wm[1].ignore_lines), new_wm->wm[1].lines,
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enast(new_wm->wm[2].ignore_lines), new_wm->wm[2].lines,
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enast(new_wm->wm[3].ignore_lines), new_wm->wm[3].lines,
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enast(new_wm->wm[4].ignore_lines), new_wm->wm[4].lines,
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enast(new_wm->wm[5].ignore_lines), new_wm->wm[5].lines,
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enast(new_wm->wm[6].ignore_lines), new_wm->wm[6].lines,
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enast(new_wm->wm[7].ignore_lines), new_wm->wm[7].lines,
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enast(new_wm->trans_wm.ignore_lines), new_wm->trans_wm.lines,
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enast(new_wm->sagv.wm0.ignore_lines), new_wm->sagv.wm0.lines,
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enast(new_wm->sagv.trans_wm.ignore_lines), new_wm->sagv.trans_wm.lines);
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] blocks %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
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" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
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plane->base.base.id, plane->base.name,
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old_wm->wm[0].blocks, old_wm->wm[1].blocks,
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old_wm->wm[2].blocks, old_wm->wm[3].blocks,
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old_wm->wm[4].blocks, old_wm->wm[5].blocks,
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old_wm->wm[6].blocks, old_wm->wm[7].blocks,
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old_wm->trans_wm.blocks,
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old_wm->sagv.wm0.blocks,
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old_wm->sagv.trans_wm.blocks,
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new_wm->wm[0].blocks, new_wm->wm[1].blocks,
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new_wm->wm[2].blocks, new_wm->wm[3].blocks,
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new_wm->wm[4].blocks, new_wm->wm[5].blocks,
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new_wm->wm[6].blocks, new_wm->wm[7].blocks,
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new_wm->trans_wm.blocks,
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new_wm->sagv.wm0.blocks,
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new_wm->sagv.trans_wm.blocks);
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drm_dbg_kms(display->drm,
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"[PLANE:%d:%s] min_ddb %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d"
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" -> %4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%4d,%5d\n",
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plane->base.base.id, plane->base.name,
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old_wm->wm[0].min_ddb_alloc, old_wm->wm[1].min_ddb_alloc,
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old_wm->wm[2].min_ddb_alloc, old_wm->wm[3].min_ddb_alloc,
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old_wm->wm[4].min_ddb_alloc, old_wm->wm[5].min_ddb_alloc,
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old_wm->wm[6].min_ddb_alloc, old_wm->wm[7].min_ddb_alloc,
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old_wm->trans_wm.min_ddb_alloc,
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old_wm->sagv.wm0.min_ddb_alloc,
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old_wm->sagv.trans_wm.min_ddb_alloc,
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new_wm->wm[0].min_ddb_alloc, new_wm->wm[1].min_ddb_alloc,
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new_wm->wm[2].min_ddb_alloc, new_wm->wm[3].min_ddb_alloc,
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new_wm->wm[4].min_ddb_alloc, new_wm->wm[5].min_ddb_alloc,
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new_wm->wm[6].min_ddb_alloc, new_wm->wm[7].min_ddb_alloc,
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new_wm->trans_wm.min_ddb_alloc,
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new_wm->sagv.wm0.min_ddb_alloc,
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new_wm->sagv.trans_wm.min_ddb_alloc);
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skl_print_plane_changes(display, plane, old_wm, new_wm);
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}
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}
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}
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