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hwmon: qti_amoled_ecm: update ecm_reset_sdam_config()
Currently ECM_SEND_IRQ and ECM_WRITE_TO_SDAM offsets in first SDAM is initialized to 0x03 to enable storing samples in two SDAMs for ECM. With an additional SDAM for ECM, these registers should be initialized accordingly. Support this by updating those registers with a value based on number of SDAMs. Change-Id: Icd262907e4fb71f8696b34f9ebf2463e281a2f66 Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
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@ -77,12 +77,15 @@
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#define ECM_SEND_IRQ 0x5F
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#define SEND_SDAM0_IRQ BIT(0)
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#define SEND_SDAM1_IRQ BIT(1)
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#define SEND_SDAM2_IRQ BIT(2)
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#define ECM_WRITE_TO_SDAM 0x60
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#define WRITE_SDAM0_DATA BIT(0)
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#define WRITE_SDAM1_DATA BIT(1)
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#define WRITE_SDAM2_DATA BIT(2)
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#define OVERWRITE_SDAM0_DATA BIT(4)
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#define OVERWRITE_SDAM1_DATA BIT(5)
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#define OVERWRITE_SDAM2_DATA BIT(6)
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#define ECM_AVERAGE_LSB 0x61
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#define ECM_AVERAGE_MSB 0x62
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@ -189,9 +192,6 @@ static struct amoled_ecm_sdam_config ecm_reset_config[] = {
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{ ECM_SDAM0_INDEX, 0x6C },
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{ ECM_SDAM1_INDEX, 0x46 },
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{ ECM_MODE, 0x00 },
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/* Valid only when ECM uses 2 SDAMs */
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{ ECM_SEND_IRQ, 0x03 },
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{ ECM_WRITE_TO_SDAM, 0x03 }
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};
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static int ecm_nvmem_device_write(struct nvmem_device *nvmem,
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@ -210,6 +210,7 @@ static int ecm_nvmem_device_write(struct nvmem_device *nvmem,
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static int ecm_reset_sdam_config(struct amoled_ecm *ecm)
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{
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int rc, i;
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u8 val = 0, val2 = 0;
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for (i = 0; i < ARRAY_SIZE(ecm_reset_config); i++) {
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rc = ecm_nvmem_device_write(ecm->sdam[0].nvmem,
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@ -222,6 +223,23 @@ static int ecm_reset_sdam_config(struct amoled_ecm *ecm)
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}
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}
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for (i = 0; i < ecm->num_sdams; i++) {
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val |= (SEND_SDAM0_IRQ << i);
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val2 |= (WRITE_SDAM0_DATA << i);
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}
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rc = ecm_nvmem_device_write(ecm->sdam[0].nvmem, ECM_SEND_IRQ, 1, &val);
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if (rc < 0) {
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pr_err("Failed to write %u to ECM_SEND_IRQ, rc=%d\n", val, rc);
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return rc;
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}
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rc = ecm_nvmem_device_write(ecm->sdam[0].nvmem, ECM_WRITE_TO_SDAM, 1,
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&val2);
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if (rc < 0)
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pr_err("Failed to write %u to ECM_WRITE_TO_SDAM, rc=%d\n", val2,
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rc);
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usleep_range(10000, 12000);
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return rc;
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