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drm/amdgpu: Setup MTYPEs for GFX 12.1.0
For GFX 12.1.0, setup correct MTYPE for a BO depending on its current location relative to the mapping GPU. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Alex Sierra <alex.sierra@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -265,6 +265,62 @@ static void gmc_v12_1_get_vm_pde(struct amdgpu_device *adev, int level,
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}
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}
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#if 0
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static void gmc_v12_1_get_coherence_flags(struct amdgpu_device *adev,
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struct amdgpu_bo *bo,
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uint64_t *flags)
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{
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struct amdgpu_device *bo_adev = amdgpu_ttm_adev(bo->tbo.bdev);
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bool is_vram = bo->tbo.resource &&
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bo->tbo.resource->mem_type == TTM_PL_VRAM;
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bool coherent = bo->flags & (AMDGPU_GEM_CREATE_COHERENT |
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AMDGPU_GEM_CREATE_EXT_COHERENT);
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bool ext_coherent = bo->flags & AMDGPU_GEM_CREATE_EXT_COHERENT;
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uint32_t gc_ip_version = amdgpu_ip_version(adev, GC_HWIP, 0);
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bool uncached = bo->flags & AMDGPU_GEM_CREATE_UNCACHED;
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unsigned int mtype, mtype_local;
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bool snoop = false;
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bool is_local;
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switch (gc_ip_version) {
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case IP_VERSION(12, 1, 0):
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mtype_local = MTYPE_RW;
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if (amdgpu_mtype_local == 1) {
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DRM_INFO_ONCE("Using MTYPE_NC for local memory\n");
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mtype_local = MTYPE_NC;
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} else if (amdgpu_mtype_local == 2) {
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DRM_INFO_ONCE("MTYPE_CC not supported, using MTYPE_RW instead for local memory\n");
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} else {
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DRM_INFO_ONCE("Using MTYPE_RW for local memory\n");
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}
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is_local = (is_vram && adev == bo_adev);
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snoop = true;
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if (uncached) {
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mtype = MTYPE_UC;
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} else if (ext_coherent) {
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mtype = is_local ? mtype_local : MTYPE_UC;
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} else {
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if (is_local)
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mtype = mtype_local;
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else
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mtype = MTYPE_NC;
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}
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break;
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default:
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if (uncached || coherent)
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mtype = MTYPE_UC;
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else
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mtype = MTYPE_NC;
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}
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if (mtype != MTYPE_NC)
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*flags = AMDGPU_PTE_MTYPE_GFX12(*flags, mtype);
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*flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
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}
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#endif
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static void gmc_v12_1_get_vm_pte(struct amdgpu_device *adev,
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struct amdgpu_vm *vm,
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struct amdgpu_bo *bo,
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@ -306,11 +362,11 @@ static void gmc_v12_1_get_vm_pte(struct amdgpu_device *adev,
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AMDGPU_GEM_CREATE_UNCACHED))
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*flags = AMDGPU_PTE_MTYPE_NV10(*flags, MTYPE_UC);
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if (bo && bo->flags & AMDGPU_GEM_CREATE_UNCACHED)
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*flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC);
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if (adev->have_atomics_support)
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*flags |= AMDGPU_PTE_BUS_ATOMICS;
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if (bo && bo->flags & AMDGPU_GEM_CREATE_UNCACHED)
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*flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC);
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}
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static const struct amdgpu_gmc_funcs gmc_v12_1_gmc_funcs = {
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@ -1305,6 +1305,21 @@ svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm,
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case IP_VERSION(12, 0, 1):
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mapping_flags |= AMDGPU_VM_MTYPE_NC;
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break;
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case IP_VERSION(12, 1, 0):
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snoop = true;
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if (domain == SVM_RANGE_VRAM_DOMAIN) {
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/* local HBM */
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if (bo_node->adev == node->adev)
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mapping_flags |= AMDGPU_VM_MTYPE_RW;
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/* Remote GPU memory */
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else
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mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC :
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AMDGPU_VM_MTYPE_NC;
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/* system memory accessed by the dGPU */
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} else {
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mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
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}
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break;
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default:
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mapping_flags |= coherent ?
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AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
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