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arm64: BST C1200 eMMC DTS for v7.2

Browse Source 
Black Sesame Technologies:
 
  Enable eMMC controller on BST C1200 CDCU1.0 board:
     - Add mmc0 node in bstc1200.dtsi (DWCMSHC SDHCI controller)
     - Add fixed clock definition and reserved SRAM bounce buffer
     - Enable mmc0 with 8-bit bus on CDCU1.0 ADAS 4C2G board
 The MMC driver was merged via mmc-next in v7.1-rc1.
 this is the remaining DTS piece.
 
 Signed-off-by: Gordon Ge <gordon.ge@bst.ai>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEmz3TJ/orQtq7bD/MVZ2TG9ppuswFAmorpOsACgkQVZ2TG9pp
 usxgxA/+Lic5qxlg6/iJa2KXDE+CBwIsl+whiNZREONRaNqkUv6zlkt9ePqGW6kO
 masF4CU83KmpE3I4PnOqVHhODcGK7Ef8KSnahvauTPzAY+AGu1kjVrgVzS3pWf/M
 ZtPYEoVIersQGg3GVhiW7GzUT4em3MSX2xAVub8g19Jri4IlQ6zTBRkofCjr9YG6
 YjmjutsWLTffM4Zf7yF03dxrW43itGGfJ/b+SAyB0RFa/jjfGbJ3ceOYwb40GF4n
 TZwDzYbLXb8F1vLG+k8+KCcuRjfNAXigkS1rKW6jyYNW51DLHtRTVVqftqMMRqPu
 EMSXpSB+8nEytNzEyLOTQ12M5YhcVPZlaqCwS60rRHuMNSpn3j3Z9gD7LFaAtpgn
 wppL0i8GfxWsGhei2SZry5HLV4SDP8J8K/U7wqxEAtIyPDEvCwzlSW2YkHfndsdz
 Hi7EbDBoxUg2gsm75k0oOPgLMTTokUT0uEUs5qw6U0zrIVEDHLADkl8kZlXK/hkp
 xybB4Dv6Rur8KYEJ1Bb/tHgP6k8yPOMEm5viVGQtxiIb364o9rwXaAoyhZXurZ82
 ha7SEjnedDmWBvFCNxO3cdFRgVyC2nVqN6DCihm4LV6hMJCALKZAsuGG7WnGVhpD
 cI3zPTApWAjlDlYpB7eF2EjhllhJHCbDprvkNUPUPfufEakpenI=
 =PSGj
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmorrtgACgkQmmx57+YA
 GNmeWRAAqeG1uTDFQgztTLrAJTHmo/uTfCg2QHnm2UEQ4dJH+QDuTtQbJhrZDQ/4
 h2EI0wro8ESYh3Yg51DTK+EGq+q2ScPzH/+kuzM3BRZLvKqs0Z5knKy+mgccXsH6
 QL8p2I4DwgnoPc7PjjmyQfLybrtZ81X+PVJWPf4jftF6ohh8AwLdImDFn73HjGOo
 FBF6lnVxKXJM/MZHMAPPGpPEllbJWz9nq7Yt/C4KhtzZos/9k3O+X4jv6tw2e+co
 mabNHN8KkmNqPwFKgy8vmcaUNQQlkLrN1Vwj73JPzdNG2trT4YtTVOdDp1Ye/YHb
 sZgSA8lAnQ48LIzkUjsXrbBGmkQk9rB3kgaBn0jh/gqXJwbttAfsYeKbgiVHyfr1
 zLsKvbQhZA+AKOX22jMWhUNL369mufF41HyiNUO3hZYf8J6GfXvf6IvK1K5CDmEU
 AcB31gNfkrVWSJAzrHIXFWvD/IWxV3PcF2q7T4KLcB/bBmK2A3tlHJy/+SdjMGm3
 Fs9fh7QjcZpUO2F2B5Wv5TK3kJw5NSTpBaolFFy2nFwFSNgJkMKxutTVg8Tazc4w
 5LzjFDzB2RdaZy6+3GNd1i2POiMqNJzvp61tEUAX07plH5L72F3GFdS5VPspvNWR
 aBs0V1FXkQEuOcO48GJgPUCA0fhsSH9lrTQtJIGku2KdW7eFvmA=
 =2c4W
 -----END PGP SIGNATURE-----

Merge tag 'bst-arm64-emmc-driver-dts-for-v7.2' of https://github.com/BlackSesame-SoC/linux into soc/dt

arm64: BST C1200 eMMC DTS for v7.2

Black Sesame Technologies:

 Enable eMMC controller on BST C1200 CDCU1.0 board:
    - Add mmc0 node in bstc1200.dtsi (DWCMSHC SDHCI controller)
    - Add fixed clock definition and reserved SRAM bounce buffer
    - Enable mmc0 with 8-bit bus on CDCU1.0 ADAS 4C2G board
The MMC driver was merged via mmc-next in v7.1-rc1.
this is the remaining DTS piece.

Signed-off-by: Gordon Ge <gordon.ge@bst.ai>

* tag 'bst-arm64-emmc-driver-dts-for-v7.2' of https://github.com/BlackSesame-SoC/linux:
  arm64: dts: bst: enable eMMC controller in C1200

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2026-06-12 09:01:25 +02:00
commit c936d73057
2 changed files with 37 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm64/boot/dts/bst/bstc1200-cdcu1.0-adas_4c2g.dts
View File

@ -17,6 +17,25 @@ memory@810000000 {
<0x8 0xc0000000 0x1 0x0>,
<0xc 0x00000000 0x0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
mmc0_reserved: mmc0-reserved@5160000 {
compatible = "shared-dma-pool";
reg = <0x0 0x5160000 0x0 0x10000>;
no-map;
};
};
};
&mmc0 {
bus-width = <8>;
memory-region = <&mmc0_reserved>;
non-removable;
status = "okay";
};
&uart0 {

18
arch/arm64/boot/dts/bst/bstc1200.dtsi
View File

@ -7,6 +7,12 @@ / {
#address-cells = <2>;
#size-cells = <2>;
clk_mmc: clock-4000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <4000000>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
@ -72,6 +78,18 @@ uart0: serial@20008000 {
status = "disabled";
};
mmc0: mmc@22200000 {
compatible = "bst,c1200-sdhci";
reg = <0x0 0x22200000 0x0 0x1000>,
<0x0 0x23006000 0x0 0x1000>;
clocks = <&clk_mmc>;
clock-names = "core";
dma-coherent;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <200000000>;
status = "disabled";
};
gic: interrupt-controller@32800000 {
compatible = "arm,gic-v3";
reg = <0x0 0x32800000 0x0 0x10000>,