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drm/msm/dp: move link-specific parsing from dp_panel to dp_link

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Since max_dp_lanes and max_dp_link_rate are link-specific parameters, move
their parsing from dp_panel to dp_link for better separation of concerns.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/675643/
Link: https://lore.kernel.org/r/20250919-add-displayport-support-for-qcs615-platform-v5-13-eae6681f4002@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
This commit is contained in:
Xiangxu Yin 2025-09-19 22:24:30 +08:00 committed by Dmitry Baryshkov
parent d7ec9366b1
commit c8fc72804d
4 changed files with 70 additions and 72 deletions
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57
drivers/gpu/drm/msm/dp/dp_link.c
View File

@ -6,12 +6,14 @@
#define pr_fmt(fmt) "[drm-dp] %s: " fmt, __func__
#include <drm/drm_device.h>
#include <drm/drm_of.h>
#include <drm/drm_print.h>
#include "dp_reg.h"
#include "dp_link.h"
#include "dp_panel.h"
#define DP_LINK_RATE_HBR2 540000 /* kbytes */
#define DP_TEST_REQUEST_MASK 0x7F
enum audio_sample_rate {
@ -1210,10 +1212,61 @@ u32 msm_dp_link_get_test_bits_depth(struct msm_dp_link *msm_dp_link, u32 bpp)
return tbd;
}
static u32 msm_dp_link_link_frequencies(struct device_node *of_node)
{
struct device_node *endpoint;
u64 frequency = 0;
int cnt;
endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */
if (!endpoint)
return 0;
cnt = of_property_count_u64_elems(endpoint, "link-frequencies");
if (cnt > 0)
of_property_read_u64_index(endpoint, "link-frequencies",
cnt - 1, &frequency);
of_node_put(endpoint);
do_div(frequency,
10 * /* from symbol rate to link rate */
1000); /* kbytes */
return frequency;
}
static int msm_dp_link_parse_dt(struct device *dev, struct msm_dp_link *msm_dp_link)
{
struct device_node *of_node = dev->of_node;
int cnt;
/*
* data-lanes is the property of msm_dp_out endpoint
*/
cnt = drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LANES);
if (cnt < 0) {
/* legacy code, data-lanes is the property of mdss_dp node */
cnt = drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES);
}
if (cnt > 0)
msm_dp_link->max_dp_lanes = cnt;
else
msm_dp_link->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */
msm_dp_link->max_dp_link_rate = msm_dp_link_link_frequencies(of_node);
if (!msm_dp_link->max_dp_link_rate)
msm_dp_link->max_dp_link_rate = DP_LINK_RATE_HBR2;
return 0;
}
struct msm_dp_link *msm_dp_link_get(struct device *dev, struct drm_dp_aux *aux)
{
struct msm_dp_link_private *link;
struct msm_dp_link *msm_dp_link;
int ret;
if (!dev || !aux) {
DRM_ERROR("invalid input\n");
@ -1229,5 +1282,9 @@ struct msm_dp_link *msm_dp_link_get(struct device *dev, struct drm_dp_aux *aux)
mutex_init(&link->psm_mutex);
msm_dp_link = &link->msm_dp_link;
ret = msm_dp_link_parse_dt(dev, msm_dp_link);
if (ret)
return ERR_PTR(ret);
return msm_dp_link;
}

4
drivers/gpu/drm/msm/dp/dp_link.h
View File

@ -12,6 +12,7 @@
#define DS_PORT_STATUS_CHANGED 0x200
#define DP_TEST_BIT_DEPTH_UNKNOWN 0xFFFFFFFF
#define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)
#define DP_MAX_NUM_DP_LANES 4
struct msm_dp_link_info {
unsigned char revision;
@ -72,6 +73,9 @@ struct msm_dp_link {
struct msm_dp_link_test_audio test_audio;
struct msm_dp_link_phy_params phy_params;
struct msm_dp_link_info link_params;
u32 max_dp_lanes;
u32 max_dp_link_rate;
};
/**

78
drivers/gpu/drm/msm/dp/dp_panel.c
View File

@ -16,9 +16,6 @@
#define DP_INTF_CONFIG_DATABUS_WIDEN BIT(4)
#define DP_MAX_NUM_DP_LANES 4
#define DP_LINK_RATE_HBR2 540000 /* kbytes */
struct msm_dp_panel_private {
struct device *dev;
struct drm_device *drm_dev;
@ -91,6 +88,7 @@ static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)
int rc, max_lttpr_lanes, max_lttpr_rate;
struct msm_dp_panel_private *panel;
struct msm_dp_link_info *link_info;
struct msm_dp_link *link;
u8 *dpcd, major, minor;
panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel);
@ -105,16 +103,20 @@ static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel)
major = (link_info->revision >> 4) & 0x0f;
minor = link_info->revision & 0x0f;
link = panel->link;
drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n",
link->max_dp_lanes, link->max_dp_link_rate);
link_info->rate = drm_dp_max_link_rate(dpcd);
link_info->num_lanes = drm_dp_max_lane_count(dpcd);
/* Limit data lanes from data-lanes of endpoint property of dtsi */
if (link_info->num_lanes > msm_dp_panel->max_dp_lanes)
link_info->num_lanes = msm_dp_panel->max_dp_lanes;
if (link_info->num_lanes > link->max_dp_lanes)
link_info->num_lanes = link->max_dp_lanes;
/* Limit link rate from link-frequencies of endpoint property of dtsi */
if (link_info->rate > msm_dp_panel->max_dp_link_rate)
link_info->rate = msm_dp_panel->max_dp_link_rate;
if (link_info->rate > link->max_dp_link_rate)
link_info->rate = link->max_dp_link_rate;
/* Limit data lanes from LTTPR capabilities, if any */
max_lttpr_lanes = drm_dp_lttpr_max_lane_count(panel->link->lttpr_common_caps);
@ -173,9 +175,6 @@ int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel,
panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel);
drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n",
msm_dp_panel->max_dp_lanes, msm_dp_panel->max_dp_link_rate);
rc = msm_dp_panel_read_dpcd(msm_dp_panel);
if (rc) {
DRM_ERROR("read dpcd failed %d\n", rc);
@ -648,60 +647,6 @@ int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel)
return 0;
}
static u32 msm_dp_panel_link_frequencies(struct device_node *of_node)
{
struct device_node *endpoint;
u64 frequency = 0;
int cnt;
endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */
if (!endpoint)
return 0;
cnt = of_property_count_u64_elems(endpoint, "link-frequencies");
if (cnt > 0)
of_property_read_u64_index(endpoint, "link-frequencies",
cnt - 1, &frequency);
of_node_put(endpoint);
do_div(frequency,
10 * /* from symbol rate to link rate */
1000); /* kbytes */
return frequency;
}
static int msm_dp_panel_parse_dt(struct msm_dp_panel *msm_dp_panel)
{
struct msm_dp_panel_private *panel;
struct device_node *of_node;
int cnt;
panel = container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_panel);
of_node = panel->dev->of_node;
/*
* data-lanes is the property of msm_dp_out endpoint
*/
cnt = drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LANES);
if (cnt < 0) {
/* legacy code, data-lanes is the property of mdss_dp node */
cnt = drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES);
}
if (cnt > 0)
msm_dp_panel->max_dp_lanes = cnt;
else
msm_dp_panel->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */
msm_dp_panel->max_dp_link_rate = msm_dp_panel_link_frequencies(of_node);
if (!msm_dp_panel->max_dp_link_rate)
msm_dp_panel->max_dp_link_rate = DP_LINK_RATE_HBR2;
return 0;
}
struct msm_dp_panel *msm_dp_panel_get(struct device *dev, struct drm_dp_aux *aux,
struct msm_dp_link *link,
void __iomem *link_base,
@ -709,7 +654,6 @@ struct msm_dp_panel *msm_dp_panel_get(struct device *dev, struct drm_dp_aux *aux
{
struct msm_dp_panel_private *panel;
struct msm_dp_panel *msm_dp_panel;
int ret;
if (!dev || !aux || !link) {
DRM_ERROR("invalid input\n");
@ -729,10 +673,6 @@ struct msm_dp_panel *msm_dp_panel_get(struct device *dev, struct drm_dp_aux *aux
msm_dp_panel = &panel->msm_dp_panel;
msm_dp_panel->max_bw_code = DP_LINK_BW_8_1;
ret = msm_dp_panel_parse_dt(msm_dp_panel);
if (ret)
return ERR_PTR(ret);
return msm_dp_panel;
}

3
drivers/gpu/drm/msm/dp/dp_panel.h
View File

@ -41,9 +41,6 @@ struct msm_dp_panel {
bool vsc_sdp_supported;
u32 hw_revision;
u32 max_dp_lanes;
u32 max_dp_link_rate;
u32 max_bw_code;
};