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iio: adc: ad4030: add support for ad4630-24 and ad4630-16
AD4630-24 and AD4630-16 are 2 channels ADCs. Both channels are interleaved bit per bit on SDO line. Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Link: https://patch.msgid.link/20250214-eblanc-ad4630_v1-v4-4-135dd66cab6a@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -33,6 +33,8 @@
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#define AD4030_REG_PRODUCT_ID_H 0x05
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#define AD4030_REG_CHIP_GRADE 0x06
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#define AD4030_REG_CHIP_GRADE_AD4030_24_GRADE 0x10
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#define AD4030_REG_CHIP_GRADE_AD4630_16_GRADE 0x03
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#define AD4030_REG_CHIP_GRADE_AD4630_24_GRADE 0x00
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#define AD4030_REG_CHIP_GRADE_MASK_CHIP_GRADE GENMASK(7, 3)
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#define AD4030_REG_SCRATCH_PAD 0x0A
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#define AD4030_REG_SPI_REVISION 0x0B
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@ -83,6 +85,7 @@
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#define AD4030_MAX_HARDWARE_CHANNEL_NB 2
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#define AD4030_MAX_IIO_CHANNEL_NB 5
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#define AD4030_SINGLE_COMMON_BYTE_CHANNELS_MASK 0b10
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#define AD4030_DUAL_COMMON_BYTE_CHANNELS_MASK 0b1100
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#define AD4030_GAIN_MIDLE_POINT 0x8000
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/*
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* This accounts for 1 sample per channel plus one s64 for the timestamp,
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@ -112,6 +115,13 @@ enum ad4030_out_mode {
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AD4030_OUT_DATA_MD_32_PATTERN,
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};
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enum {
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AD4030_LANE_MD_1_PER_CH,
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AD4030_LANE_MD_2_PER_CH,
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AD4030_LANE_MD_4_PER_CH,
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AD4030_LANE_MD_INTERLEAVED,
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};
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enum {
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AD4030_SCAN_TYPE_NORMAL,
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AD4030_SCAN_TYPE_AVG,
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@ -150,7 +160,11 @@ struct ad4030_state {
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struct {
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s32 diff;
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u8 common;
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};
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} single;
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struct {
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s32 diff[2];
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u8 common[2];
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} dual;
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} rx_data;
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};
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@ -514,19 +528,33 @@ static int ad4030_set_avg_frame_len(struct iio_dev *dev, int avg_val)
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static bool ad4030_is_common_byte_asked(struct ad4030_state *st,
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unsigned int mask)
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{
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return mask & AD4030_SINGLE_COMMON_BYTE_CHANNELS_MASK;
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return mask & (st->chip->num_voltage_inputs == 1 ?
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AD4030_SINGLE_COMMON_BYTE_CHANNELS_MASK :
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AD4030_DUAL_COMMON_BYTE_CHANNELS_MASK);
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}
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static int ad4030_set_mode(struct iio_dev *indio_dev, unsigned long mask)
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{
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struct ad4030_state *st = iio_priv(indio_dev);
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if (st->avg_log2 > 0)
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if (st->avg_log2 > 0) {
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st->mode = AD4030_OUT_DATA_MD_30_AVERAGED_DIFF;
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else if (ad4030_is_common_byte_asked(st, mask))
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st->mode = AD4030_OUT_DATA_MD_24_DIFF_8_COM;
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else
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} else if (ad4030_is_common_byte_asked(st, mask)) {
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switch (st->chip->precision_bits) {
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case 16:
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st->mode = AD4030_OUT_DATA_MD_16_DIFF_8_COM;
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break;
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case 24:
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st->mode = AD4030_OUT_DATA_MD_24_DIFF_8_COM;
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break;
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default:
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return -EINVAL;
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}
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} else {
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st->mode = AD4030_OUT_DATA_MD_DIFF;
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}
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st->current_scan_type = iio_get_current_scan_type(indio_dev,
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st->chip->channels);
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@ -538,11 +566,52 @@ static int ad4030_set_mode(struct iio_dev *indio_dev, unsigned long mask)
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st->mode);
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}
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/*
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* Descramble 2 32bits numbers out of a 64bits. The bits are interleaved:
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* 1 bit for first number, 1 bit for the second, and so on...
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*/
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static void ad4030_extract_interleaved(u8 *src, u32 *ch0, u32 *ch1)
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{
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u8 h0, h1, l0, l1;
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u32 out0, out1;
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u8 *out0_raw = (u8 *)&out0;
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u8 *out1_raw = (u8 *)&out1;
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for (int i = 0; i < 4; i++) {
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h0 = src[i * 2];
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l1 = src[i * 2 + 1];
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h1 = h0 << 1;
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l0 = l1 >> 1;
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h0 &= 0xAA;
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l0 &= 0x55;
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h1 &= 0xAA;
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l1 &= 0x55;
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h0 = (h0 | h0 << 001) & 0xCC;
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h1 = (h1 | h1 << 001) & 0xCC;
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l0 = (l0 | l0 >> 001) & 0x33;
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l1 = (l1 | l1 >> 001) & 0x33;
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h0 = (h0 | h0 << 002) & 0xF0;
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h1 = (h1 | h1 << 002) & 0xF0;
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l0 = (l0 | l0 >> 002) & 0x0F;
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l1 = (l1 | l1 >> 002) & 0x0F;
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out0_raw[i] = h0 | l0;
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out1_raw[i] = h1 | l1;
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}
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*ch0 = out0;
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*ch1 = out1;
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}
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static int ad4030_conversion(struct iio_dev *indio_dev)
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{
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struct ad4030_state *st = iio_priv(indio_dev);
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unsigned char diff_realbytes =
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BITS_TO_BYTES(st->current_scan_type->realbits);
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unsigned char diff_storagebytes =
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BITS_TO_BYTES(st->current_scan_type->storagebits);
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unsigned int bytes_to_read;
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unsigned long cnv_nb = BIT(st->avg_log2);
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unsigned int i;
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@ -567,10 +636,23 @@ static int ad4030_conversion(struct iio_dev *indio_dev)
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if (ret)
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return ret;
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if (st->mode != AD4030_OUT_DATA_MD_24_DIFF_8_COM)
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if (st->chip->num_voltage_inputs == 2)
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ad4030_extract_interleaved(st->rx_data.raw,
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&st->rx_data.dual.diff[0],
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&st->rx_data.dual.diff[1]);
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if (st->mode != AD4030_OUT_DATA_MD_16_DIFF_8_COM &&
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st->mode != AD4030_OUT_DATA_MD_24_DIFF_8_COM)
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return 0;
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st->rx_data.common = st->rx_data.raw[diff_realbytes];
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if (st->chip->num_voltage_inputs == 1) {
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st->rx_data.single.common = st->rx_data.raw[diff_realbytes];
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return 0;
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}
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for (i = 0; i < st->chip->num_voltage_inputs; i++)
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st->rx_data.dual.common[i] =
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st->rx_data.raw[diff_storagebytes * i + diff_realbytes];
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return 0;
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}
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@ -585,14 +667,25 @@ static int ad4030_single_conversion(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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st->current_scan_type = iio_get_current_scan_type(indio_dev,
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st->chip->channels);
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if (IS_ERR(st->current_scan_type))
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return PTR_ERR(st->current_scan_type);
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ret = ad4030_conversion(indio_dev);
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if (ret)
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return ret;
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if (chan->differential)
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*val = st->rx_data.diff;
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if (st->chip->num_voltage_inputs == 1)
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*val = st->rx_data.single.diff;
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else
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*val = st->rx_data.dual.diff[chan->address];
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else
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*val = st->rx_data.common;
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if (st->chip->num_voltage_inputs == 1)
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*val = st->rx_data.single.common;
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else
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*val = st->rx_data.dual.common[chan->address];
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return IIO_VAL_INT;
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}
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@ -874,10 +967,24 @@ static int ad4030_detect_chip_info(const struct ad4030_state *st)
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static int ad4030_config(struct ad4030_state *st)
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{
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int ret;
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u8 reg_modes;
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st->offset_avail[0] = (int)BIT(st->chip->precision_bits - 1) * -1;
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st->offset_avail[1] = 1;
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st->offset_avail[2] = BIT(st->chip->precision_bits - 1) - 1;
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if (st->chip->num_voltage_inputs > 1)
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reg_modes = FIELD_PREP(AD4030_REG_MODES_MASK_LANE_MODE,
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AD4030_LANE_MD_INTERLEAVED);
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else
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reg_modes = FIELD_PREP(AD4030_REG_MODES_MASK_LANE_MODE,
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AD4030_LANE_MD_1_PER_CH);
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ret = regmap_write(st->regmap, AD4030_REG_MODES, reg_modes);
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if (ret)
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return ret;
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if (st->vio_uv < AD4030_VIO_THRESHOLD_UV)
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return regmap_write(st->regmap, AD4030_REG_IO,
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AD4030_REG_IO_MASK_IO2X);
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@ -966,6 +1073,14 @@ static const unsigned long ad4030_channel_masks[] = {
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0,
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};
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static const unsigned long ad4630_channel_masks[] = {
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/* Differential only */
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BIT(1) | BIT(0),
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/* Differential with common byte */
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GENMASK(3, 0),
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0,
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};
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static const struct iio_scan_type ad4030_24_scan_types[] = {
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[AD4030_SCAN_TYPE_NORMAL] = {
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.sign = 's',
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@ -983,6 +1098,23 @@ static const struct iio_scan_type ad4030_24_scan_types[] = {
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},
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};
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static const struct iio_scan_type ad4030_16_scan_types[] = {
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[AD4030_SCAN_TYPE_NORMAL] = {
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.sign = 's',
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.storagebits = 32,
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.realbits = 16,
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.shift = 16,
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.endianness = IIO_BE,
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},
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[AD4030_SCAN_TYPE_AVG] = {
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.sign = 's',
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.storagebits = 32,
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.realbits = 30,
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.shift = 2,
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.endianness = IIO_BE,
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}
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};
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static const struct ad4030_chip_info ad4030_24_chip_info = {
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.name = "ad4030-24",
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.available_masks = ad4030_channel_masks,
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@ -997,14 +1129,50 @@ static const struct ad4030_chip_info ad4030_24_chip_info = {
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.tcyc_ns = AD4030_TCYC_ADJUSTED_NS,
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};
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static const struct ad4030_chip_info ad4630_16_chip_info = {
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.name = "ad4630-16",
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.available_masks = ad4630_channel_masks,
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.channels = {
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AD4030_CHAN_DIFF(0, ad4030_16_scan_types),
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AD4030_CHAN_DIFF(1, ad4030_16_scan_types),
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AD4030_CHAN_CMO(2, 0),
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AD4030_CHAN_CMO(3, 1),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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},
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.grade = AD4030_REG_CHIP_GRADE_AD4630_16_GRADE,
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.precision_bits = 16,
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.num_voltage_inputs = 2,
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.tcyc_ns = AD4030_TCYC_ADJUSTED_NS,
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};
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static const struct ad4030_chip_info ad4630_24_chip_info = {
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.name = "ad4630-24",
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.available_masks = ad4630_channel_masks,
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.channels = {
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AD4030_CHAN_DIFF(0, ad4030_24_scan_types),
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AD4030_CHAN_DIFF(1, ad4030_24_scan_types),
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AD4030_CHAN_CMO(2, 0),
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AD4030_CHAN_CMO(3, 1),
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IIO_CHAN_SOFT_TIMESTAMP(4),
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},
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.grade = AD4030_REG_CHIP_GRADE_AD4630_24_GRADE,
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.precision_bits = 24,
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.num_voltage_inputs = 2,
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.tcyc_ns = AD4030_TCYC_ADJUSTED_NS,
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};
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static const struct spi_device_id ad4030_id_table[] = {
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{ "ad4030-24", (kernel_ulong_t)&ad4030_24_chip_info },
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{ "ad4630-16", (kernel_ulong_t)&ad4630_16_chip_info },
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{ "ad4630-24", (kernel_ulong_t)&ad4630_24_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, ad4030_id_table);
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static const struct of_device_id ad4030_of_match[] = {
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{ .compatible = "adi,ad4030-24", .data = &ad4030_24_chip_info },
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{ .compatible = "adi,ad4630-16", .data = &ad4630_16_chip_info },
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{ .compatible = "adi,ad4630-24", .data = &ad4630_24_chip_info },
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{ }
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};
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MODULE_DEVICE_TABLE(of, ad4030_of_match);
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