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x86/hyperv: Use direct call to hypercall-page
Instead of using an indirect call to the hypercall page, use a direct call instead. This avoids all CFI problems, including the one where the hypercall page doesn't have IBT on. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Acked-by: Sean Christopherson <seanjc@google.com> Link: https://lkml.kernel.org/r/20250714103441.011387946@infradead.org
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@ -17,7 +17,6 @@
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#include <asm/desc.h>
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#include <asm/desc.h>
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#include <asm/e820/api.h>
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#include <asm/e820/api.h>
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#include <asm/sev.h>
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#include <asm/sev.h>
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#include <asm/ibt.h>
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#include <asm/hypervisor.h>
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#include <asm/hypervisor.h>
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#include <hyperv/hvhdk.h>
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#include <hyperv/hvhdk.h>
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#include <asm/mshyperv.h>
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#include <asm/mshyperv.h>
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@ -39,23 +38,41 @@
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void *hv_hypercall_pg;
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void *hv_hypercall_pg;
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_X86_64
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static u64 __hv_hyperfail(u64 control, u64 param1, u64 param2)
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{
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return U64_MAX;
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}
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DEFINE_STATIC_CALL(__hv_hypercall, __hv_hyperfail);
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u64 hv_std_hypercall(u64 control, u64 param1, u64 param2)
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u64 hv_std_hypercall(u64 control, u64 param1, u64 param2)
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{
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{
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u64 hv_status;
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u64 hv_status;
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if (!hv_hypercall_pg)
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return U64_MAX;
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register u64 __r8 asm("r8") = param2;
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register u64 __r8 asm("r8") = param2;
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asm volatile (CALL_NOSPEC
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asm volatile ("call " STATIC_CALL_TRAMP_STR(__hv_hypercall)
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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: "=a" (hv_status), ASM_CALL_CONSTRAINT,
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"+c" (control), "+d" (param1), "+r" (__r8)
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"+c" (control), "+d" (param1), "+r" (__r8)
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: THUNK_TARGET(hv_hypercall_pg)
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: : "cc", "memory", "r9", "r10", "r11");
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: "cc", "memory", "r9", "r10", "r11");
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return hv_status;
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return hv_status;
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}
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}
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typedef u64 (*hv_hypercall_f)(u64 control, u64 param1, u64 param2);
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static inline void hv_set_hypercall_pg(void *ptr)
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{
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hv_hypercall_pg = ptr;
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if (!ptr)
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ptr = &__hv_hyperfail;
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static_call_update(__hv_hypercall, (hv_hypercall_f)ptr);
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}
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#else
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#else
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static inline void hv_set_hypercall_pg(void *ptr)
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{
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hv_hypercall_pg = ptr;
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}
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EXPORT_SYMBOL_GPL(hv_hypercall_pg);
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EXPORT_SYMBOL_GPL(hv_hypercall_pg);
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#endif
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#endif
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@ -350,7 +367,7 @@ static int hv_suspend(void)
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* pointer is restored on resume.
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* pointer is restored on resume.
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*/
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*/
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hv_hypercall_pg_saved = hv_hypercall_pg;
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hv_hypercall_pg_saved = hv_hypercall_pg;
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hv_hypercall_pg = NULL;
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hv_set_hypercall_pg(NULL);
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/* Disable the hypercall page in the hypervisor */
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/* Disable the hypercall page in the hypervisor */
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rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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rdmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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@ -376,7 +393,7 @@ static void hv_resume(void)
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vmalloc_to_pfn(hv_hypercall_pg_saved);
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vmalloc_to_pfn(hv_hypercall_pg_saved);
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wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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hv_hypercall_pg = hv_hypercall_pg_saved;
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hv_set_hypercall_pg(hv_hypercall_pg_saved);
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hv_hypercall_pg_saved = NULL;
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hv_hypercall_pg_saved = NULL;
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/*
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/*
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@ -496,8 +513,8 @@ void __init hyperv_init(void)
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if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present)
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if (hv_isolation_type_tdx() && !ms_hyperv.paravisor_present)
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goto skip_hypercall_pg_init;
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goto skip_hypercall_pg_init;
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hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START,
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hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, MODULES_VADDR,
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VMALLOC_END, GFP_KERNEL, PAGE_KERNEL_ROX,
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MODULES_END, GFP_KERNEL, PAGE_KERNEL_ROX,
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VM_FLUSH_RESET_PERMS, NUMA_NO_NODE,
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VM_FLUSH_RESET_PERMS, NUMA_NO_NODE,
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__builtin_return_address(0));
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__builtin_return_address(0));
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if (hv_hypercall_pg == NULL)
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if (hv_hypercall_pg == NULL)
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@ -535,27 +552,9 @@ void __init hyperv_init(void)
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wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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wrmsrq(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
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}
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}
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skip_hypercall_pg_init:
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hv_set_hypercall_pg(hv_hypercall_pg);
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/*
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* Some versions of Hyper-V that provide IBT in guest VMs have a bug
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* in that there's no ENDBR64 instruction at the entry to the
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* hypercall page. Because hypercalls are invoked via an indirect call
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* to the hypercall page, all hypercall attempts fail when IBT is
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* enabled, and Linux panics. For such buggy versions, disable IBT.
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*
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* Fixed versions of Hyper-V always provide ENDBR64 on the hypercall
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* page, so if future Linux kernel versions enable IBT for 32-bit
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* builds, additional hypercall page hackery will be required here
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* to provide an ENDBR32.
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*/
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#ifdef CONFIG_X86_KERNEL_IBT
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if (cpu_feature_enabled(X86_FEATURE_IBT) &&
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*(u32 *)hv_hypercall_pg != gen_endbr()) {
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setup_clear_cpu_cap(X86_FEATURE_IBT);
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pr_warn("Disabling IBT because of Hyper-V bug\n");
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}
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#endif
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skip_hypercall_pg_init:
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/*
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/*
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* hyperv_init() is called before LAPIC is initialized: see
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* hyperv_init() is called before LAPIC is initialized: see
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* apic_intr_mode_init() -> x86_platform.apic_post_init() and
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* apic_intr_mode_init() -> x86_platform.apic_post_init() and
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