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arm64: dts: qcom: sm8550: Update idle state time requirements

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[ Upstream commit ad6556fb45 ]

The idle state entry/exit/residency times differ from what shipped on
production devices, mostly being overly optimistic in entry times and
overly pessimistic in minimal residency times. Align them with
downstream sources.

Fixes: ffc50b2d38 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-12-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Konrad Dybcio 2023-12-18 17:02:13 +01:00 committed by Greg Kroah-Hartman
parent ff8434b61c
commit c811f0246b
1 changed files with 10 additions and 10 deletions
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20
arch/arm64/boot/dts/qcom/sm8550.dtsi
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@ -283,9 +283,9 @@ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "silver-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <800>;
entry-latency-us = <550>;
exit-latency-us = <750>;
min-residency-us = <4090>;
min-residency-us = <6700>;
local-timer-stop;
};
@ -294,8 +294,8 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
idle-state-name = "gold-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <600>;
exit-latency-us = <1550>;
min-residency-us = <4791>;
exit-latency-us = <1300>;
min-residency-us = <8136>;
local-timer-stop;
};
@ -314,17 +314,17 @@ domain-idle-states {
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x41000044>;
entry-latency-us = <1050>;
exit-latency-us = <2500>;
min-residency-us = <5309>;
entry-latency-us = <750>;
exit-latency-us = <2350>;
min-residency-us = <9144>;
};
CLUSTER_SLEEP_1: cluster-sleep-1 {
compatible = "domain-idle-state";
arm,psci-suspend-param = <0x4100c344>;
entry-latency-us = <2700>;
exit-latency-us = <3500>;
min-residency-us = <13959>;
entry-latency-us = <2800>;
exit-latency-us = <4400>;
min-residency-us = <10150>;
};
};
};