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drm/i915/display: move clock-gating init for IBX to display

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Add a new function in the display code to help initialize clock-gating
without reading display PCH registers directly from non-display code.

This adds a mini-framework to deal with display-specific PCH registers
and uses it for IBX as a start.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patch.msgid.link/20260324080441.154609-2-luciano.coelho@intel.com
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Luca Coelho 2026-03-24 10:04:25 +02:00
parent ff854b32b6
commit c80c68e777
3 changed files with 27 additions and 11 deletions
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24
drivers/gpu/drm/i915/display/intel_pch.c
View File

@ -5,6 +5,8 @@
#include <drm/drm_print.h>
#include "intel_de.h"
#include "intel_display_regs.h"
#include "intel_display_core.h"
#include "intel_display_utils.h"
#include "intel_pch.h"
@ -214,6 +216,28 @@ intel_pch_type(const struct intel_display *display, unsigned short id)
}
}
static void intel_pch_ibx_init_clock_gating(struct intel_display *display)
{
/*
* On Ibex Peak and Cougar Point, we need to disable clock
* gating for the panel power sequencer or it will fail to
* start up when no ports are active.
*/
intel_de_write(display, SOUTH_DSPCLK_GATE_D,
PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
}
void intel_pch_init_clock_gating(struct intel_display *display)
{
switch (INTEL_PCH_TYPE(display)) {
case PCH_IBX:
intel_pch_ibx_init_clock_gating(display);
break;
default:
break;
}
}
static bool intel_is_virt_pch(unsigned short id,
unsigned short svendor, unsigned short sdevice)
{

1
drivers/gpu/drm/i915/display/intel_pch.h
View File

@ -52,5 +52,6 @@ enum intel_pch {
#define HAS_PCH_SPLIT(display) (INTEL_PCH_TYPE(display) != PCH_NONE)
void intel_pch_detect(struct intel_display *display);
void intel_pch_init_clock_gating(struct intel_display *display);
#endif /* __INTEL_PCH__ */

13
drivers/gpu/drm/i915/intel_clock_gating.c
View File

@ -33,6 +33,7 @@
#include "display/intel_display.h"
#include "display/intel_display_core.h"
#include "display/intel_display_regs.h"
#include "display/intel_pch.h"
#include "gt/intel_engine_regs.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_mcr.h"
@ -124,16 +125,6 @@ static void glk_init_clock_gating(struct drm_i915_private *i915)
PWM1_GATING_DIS | PWM2_GATING_DIS);
}
static void ibx_init_clock_gating(struct drm_i915_private *i915)
{
/*
* On Ibex Peak and Cougar Point, we need to disable clock
* gating for the panel power sequencer or it will fail to
* start up when no ports are active.
*/
intel_uncore_write(&i915->uncore, SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
}
static void g4x_disable_trickle_feed(struct drm_i915_private *dev_priv)
{
struct intel_display *display = dev_priv->display;
@ -202,7 +193,7 @@ static void ilk_init_clock_gating(struct drm_i915_private *i915)
g4x_disable_trickle_feed(i915);
ibx_init_clock_gating(i915);
intel_pch_init_clock_gating(i915->display);
}
static void cpt_init_clock_gating(struct drm_i915_private *i915)