arm64: dts: fsd: add ufs device node

Adds FSD ufs device node and enable the same for fsd platform.
This also adds the required pin configuration for the same.

Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220603154714.30532-8-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Alim Akhtar 2022-06-03 21:17:14 +05:30 committed by Krzysztof Kozlowski
parent d742e8e291
commit c75f5c9e11
3 changed files with 47 additions and 0 deletions

View File

@ -37,3 +37,7 @@ &fin_pll {
&serial_0 {
status = "okay";
};
&ufs {
status = "okay";
};

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@ -50,6 +50,20 @@ gpf5: gpf5-gpio-bank {
interrupt-controller;
#interrupt-cells = <2>;
};
ufs_rst_n: ufs-rst-n-pins {
samsung,pins = "gpf5-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
};
ufs_refclk_out: ufs-refclk-out-pins {
samsung,pins = "gpf5-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>;
};
};
&pinctrl_peric {

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@ -831,6 +831,35 @@ timer@10040000 {
clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>;
clock-names = "fin_pll", "mct";
};
ufs: ufs@15120000 {
compatible = "tesla,fsd-ufs";
reg = <0x0 0x15120000 0x0 0x200>, /* 0: HCI standard */
<0x0 0x15121100 0x0 0x200>, /* 1: Vendor specified */
<0x0 0x15110000 0x0 0x8000>, /* 2: UNIPRO */
<0x0 0x15130000 0x0 0x100>; /* 3: UFS protector */
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock_fsys0 UFS0_TOP0_HCLK_BUS>,
<&clock_fsys0 UFS0_TOP0_CLK_UNIPRO>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_phy>;
phy-names = "ufs-phy";
status = "disabled";
};
ufs_phy: ufs-phy@15124000 {
compatible = "tesla,fsd-ufs-phy";
reg = <0x0 0x15124000 0x0 0x800>;
reg-names = "phy-pma";
samsung,pmu-syscon = <&pmu_system_controller>;
#phy-cells = <0>;
clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>;
clock-names = "ref_clk";
};
};
};