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arm64: dts: fsd: fix drive strength macros as per FSD HW UM
[ Upstream commit574d6c59da] Drive strength macros defined for FSD platform is not reflecting actual names and values as per HW UM. FSD SoC pinctrl has following four levels of drive-strength and their corresponding values: Level-1 <-> 0 Level-2 <-> 1 Level-4 <-> 2 Level-6 <-> 3 The commit684dac402f("arm64: dts: fsd: Add initial pinctrl support") used drive strength macros defined for Exynos4 SoC family. For some IPs the macros values of Exynos4 matched and worked well, but Exynos4 SoC family drive-strength (names and values) is not exactly matching with FSD SoC. Fix the drive strength macros to reflect actual names and values given in FSD HW UM. Fixes:684dac402f("arm64: dts: fsd: Add initial pinctrl support") Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20221013104024.50179-2-p.rajanbabu@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -55,14 +55,14 @@ ufs_rst_n: ufs-rst-n-pins {
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samsung,pins = "gpf5-0";
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samsung,pin-function = <FSD_PIN_FUNC_2>;
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samsung,pin-pud = <FSD_PIN_PULL_NONE>;
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samsung,pin-drv = <FSD_PIN_DRV_LV2>;
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samsung,pin-drv = <FSD_PIN_DRV_LV4>;
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};
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ufs_refclk_out: ufs-refclk-out-pins {
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samsung,pins = "gpf5-1";
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samsung,pin-function = <FSD_PIN_FUNC_2>;
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samsung,pin-pud = <FSD_PIN_PULL_NONE>;
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samsung,pin-drv = <FSD_PIN_DRV_LV2>;
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samsung,pin-drv = <FSD_PIN_DRV_LV4>;
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};
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};
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@ -239,14 +239,14 @@ pwm0_out: pwm0-out-pins {
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samsung,pins = "gpb6-1";
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samsung,pin-function = <FSD_PIN_FUNC_2>;
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samsung,pin-pud = <FSD_PIN_PULL_UP>;
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samsung,pin-drv = <FSD_PIN_DRV_LV2>;
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samsung,pin-drv = <FSD_PIN_DRV_LV4>;
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};
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pwm1_out: pwm1-out-pins {
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samsung,pins = "gpb6-5";
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samsung,pin-function = <FSD_PIN_FUNC_2>;
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samsung,pin-pud = <FSD_PIN_PULL_UP>;
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samsung,pin-drv = <FSD_PIN_DRV_LV2>;
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samsung,pin-drv = <FSD_PIN_DRV_LV4>;
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};
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hs_i2c0_bus: hs-i2c0-bus-pins {
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@ -16,9 +16,9 @@
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#define FSD_PIN_PULL_UP 3
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#define FSD_PIN_DRV_LV1 0
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#define FSD_PIN_DRV_LV2 2
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#define FSD_PIN_DRV_LV3 1
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#define FSD_PIN_DRV_LV4 3
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#define FSD_PIN_DRV_LV2 1
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#define FSD_PIN_DRV_LV4 2
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#define FSD_PIN_DRV_LV6 3
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#define FSD_PIN_FUNC_INPUT 0
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#define FSD_PIN_FUNC_OUTPUT 1
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