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KVM: x86: Move posted interrupt tracepoint to common code

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Move the pi_irte_update tracepoint to common x86, and call it whenever the
IRTE is modified.  Tracing only the modifications that result in an IRQ
being posted to a vCPU makes the tracepoint useless for debugging.

Drop the vendor specific address; plumbing that into common code isn't
worth the trouble, as the address is meaningless without a whole pile of
other information that isn't provided in any tracepoint.

Link: https://lore.kernel.org/r/20250611224604.313496-31-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Sean Christopherson 2025-06-11 15:45:32 -07:00
parent cf04ec393e
commit c5af31698d
5 changed files with 17 additions and 24 deletions
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12
arch/x86/kvm/irq.c
View File

@ -511,9 +511,11 @@ void kvm_arch_irq_routing_update(struct kvm *kvm)
static int kvm_pi_update_irte(struct kvm_kernel_irqfd *irqfd,
struct kvm_kernel_irq_routing_entry *entry)
{
unsigned int host_irq = irqfd->producer->irq;
struct kvm *kvm = irqfd->kvm;
struct kvm_vcpu *vcpu = NULL;
struct kvm_lapic_irq irq;
int r;
if (!irqchip_in_kernel(kvm) ||
!kvm_arch_has_irq_bypass() ||
@ -540,8 +542,13 @@ static int kvm_pi_update_irte(struct kvm_kernel_irqfd *irqfd,
vcpu = NULL;
}
return kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, irqfd->producer->irq,
irqfd->gsi, vcpu, irq.vector);
r = kvm_x86_call(pi_update_irte)(irqfd, irqfd->kvm, host_irq, irqfd->gsi,
vcpu, irq.vector);
if (r)
return r;
trace_kvm_pi_irte_update(host_irq, vcpu, irqfd->gsi, irq.vector, !!vcpu);
return 0;
}
int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
@ -595,6 +602,7 @@ void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
spin_unlock_irq(&kvm->irqfds.lock);
kvm_arch_end_assignment(irqfd->kvm);
}

6
arch/x86/kvm/svm/avic.c
View File

@ -816,9 +816,6 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
*/
svm_ir_list_del(irqfd);
pr_debug("SVM: %s: host_irq=%#x, guest_irq=%#x, set=%#x\n",
__func__, host_irq, guest_irq, !!vcpu);
/**
* Here, we setup with legacy mode in the following cases:
* 1. When cannot target interrupt to a specific vcpu.
@ -854,9 +851,6 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
*/
if (!ret)
ret = svm_ir_list_add(to_svm(vcpu), irqfd, &pi);
trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq,
vector, vcpu_info.pi_desc_addr, true);
} else {
ret = irq_set_vcpu_affinity(host_irq, NULL);
}

19
arch/x86/kvm/trace.h
View File

@ -1176,37 +1176,32 @@ TRACE_EVENT(kvm_smm_transition,
* Tracepoint for VT-d posted-interrupts and AMD-Vi Guest Virtual APIC.
*/
TRACE_EVENT(kvm_pi_irte_update,
TP_PROTO(unsigned int host_irq, unsigned int vcpu_id,
unsigned int gsi, unsigned int gvec,
u64 pi_desc_addr, bool set),
TP_ARGS(host_irq, vcpu_id, gsi, gvec, pi_desc_addr, set),
TP_PROTO(unsigned int host_irq, struct kvm_vcpu *vcpu,
unsigned int gsi, unsigned int gvec, bool set),
TP_ARGS(host_irq, vcpu, gsi, gvec, set),
TP_STRUCT__entry(
__field( unsigned int, host_irq )
__field( unsigned int, vcpu_id )
__field( int, vcpu_id )
__field( unsigned int, gsi )
__field( unsigned int, gvec )
__field( u64, pi_desc_addr )
__field( bool, set )
),
TP_fast_assign(
__entry->host_irq = host_irq;
__entry->vcpu_id = vcpu_id;
__entry->vcpu_id = vcpu ? vcpu->vcpu_id : -1;
__entry->gsi = gsi;
__entry->gvec = gvec;
__entry->pi_desc_addr = pi_desc_addr;
__entry->set = set;
),
TP_printk("PI is %s for irq %u, vcpu %u, gsi: 0x%x, "
"gvec: 0x%x, pi_desc_addr: 0x%llx",
TP_printk("PI is %s for irq %u, vcpu %d, gsi: 0x%x, gvec: 0x%x",
__entry->set ? "enabled and being updated" : "disabled",
__entry->host_irq,
__entry->vcpu_id,
__entry->gsi,
__entry->gvec,
__entry->pi_desc_addr)
__entry->gvec)
);
/*

3
arch/x86/kvm/vmx/posted_intr.c
View File

@ -308,9 +308,6 @@ int vmx_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
.vector = vector,
};
trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq,
vcpu_info.vector, vcpu_info.pi_desc_addr, true);
return irq_set_vcpu_affinity(host_irq, &vcpu_info);
} else {
return irq_set_vcpu_affinity(host_irq, NULL);

1
arch/x86/kvm/x86.c
View File

@ -13891,7 +13891,6 @@ EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);