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arm64 fixes for -rc6
- Fix handling of CPU erratum #2645198 when batching pte updates - Fix truncation of CPU frequency calculation by using 64-bit arithmetic in arch_freq_get_on_cpu() - Work around AMU erratum #3821522 on Cortex-A725 - Fix panic when trying to restore an SVE sigframe on a CPU that only supports SME -----BEGIN PGP SIGNATURE----- iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmq/tpYQHHdpbGxAa2Vy bmVsLm9yZwAKCRC3rHDchMFjNJ6gB/9ZmDMU4ED2AbyP7T8Q6FttzvH01X85F2yz hlaaXv/2MDzjGSiz0spxDAZOuteJF+WSLj1WjZhlyr95xnQWfumc6D89D+kHeNre +twed6hbOQTWJzLB+u8Ef+4nKGcztIZ/FafFvPD6PKjFuhG048al8X/6oNXetBPy Ka13ywRYhnccflsWaXyWlvSwfKn2xJHOnpu4Mfbsb9DfaULDLLahz2ug+6apwX23 tc/dy40Fi0G6wFzUQGF83R3nsyZgLiOv7LFBjjqDmoiu7W86KXn83UXEwHXrp8de Zbynk7F4Bxf0lsp6y+bxTmwzm8CwI355/NFU2ccxxu17e7Qv6PnJ =TRoC -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "Half of this is broken hardware (AMU counters and TLB invalidation) and the other half is broken software (frequency scaling and signals). So it seems as though we're all as bad as each other. The AMU workaround is a little noisy, as it refactors an existing workaround so that it can more easily be applied to additional CPUs. Summary: - Fix handling of CPU erratum #2645198 when batching pte updates - Fix truncation of CPU frequency calculation by using 64-bit arithmetic in arch_freq_get_on_cpu() - Work around AMU erratum #3821522 on Cortex-A725 - Fix panic when trying to restore an SVE sigframe on a CPU that only supports SME" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/fpsimd: signal: Forbid non-streaming SVE payload on SME-only systems arm64: errata: Add Cortex-A725 erratum 3821522 workaround arm64: errata: Factor out broken AMU const counter cap arm64: topology: fix arch_freq_get_on_cpu() overflow above 4.19 GHz arm64: mm: Fix the break-before-make flush range for erratum 2645198
This commit is contained in:
Linus Torvalds
commit
c5adb6c8a2
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@ -174,6 +174,8 @@ stable kernels.
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-A725 | #3821522 | ARM64_ERRATUM_3821522 |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X1 | #1502854 | N/A |
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+----------------+-----------------+-----------------+-----------------------------+
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| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
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@ -1040,9 +1040,17 @@ config ARM64_ERRATUM_1902691
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If unsure, say Y.
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config ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT
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bool
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# Targeting errata affecting AMEVCNTR01, the AMU constant counter.
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# On affected CPUs the counter may not increment at the expected rate,
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# making it unreliable. As a result, AMU users should treat it as
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# unavailable rather than relying on misleading counter values.
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config ARM64_ERRATUM_2457168
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bool "Cortex-A510: 2457168: workaround for AMEVCNTR01 incrementing incorrectly"
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depends on ARM64_AMU_EXTN
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select ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT
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default y
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help
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This option adds the workaround for ARM Cortex-A510 erratum 2457168.
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@ -1073,6 +1081,28 @@ config ARM64_ERRATUM_2645198
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If unsure, say Y.
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config ARM64_ERRATUM_3821522
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bool "Cortex-A725: 3821522: workaround for possible CNT_CYCLES increment error due to WFE/WFI"
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depends on ARM64_AMU_EXTN
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select ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT
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default y
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help
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This option adds the workaround for ARM Cortex-A725 erratum 3821522.
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On affected A725 cores, the CNT_CYCLES event may incur a significant
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increment error when entering and subsequently exiting WFx.
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As a result, the CNT_CYCLES may diverge from the system counter
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frequency at which it is expected to increment.
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This renders the AMU counter AMEVCNTR01, that implements CNT_CYCLES,
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being unreliable and unsuitable for use.
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Since there is no hardware workaround, reads of the affected CNT_CYCLES
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counter return 0 in the relevant paths. This causes users of the counter
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to treat it as unavailable and is functionally equivalent to firmware
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disabling the affected counter.
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If unsure, say Y.
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config ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD
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bool
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@ -384,6 +384,20 @@ static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
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};
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#endif
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#ifdef CONFIG_ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT
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static const struct midr_range workaround_amu_constcnt_list[] = {
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#ifdef CONFIG_ARM64_ERRATUM_2457168
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/* Cortex-A510 r0p0-r1p1 */
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MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1),
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_3821522
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/* Cortex-A725 r0p0 - r0p2 */
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MIDR_RANGE(MIDR_CORTEX_A725, 0, 0, 0, 2),
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#endif
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{}
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};
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#endif /* CONFIG_ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT */
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#ifdef CONFIG_CAVIUM_ERRATUM_23154
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static const struct midr_range cavium_erratum_23154_cpus[] = {
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MIDR_ALL_VERSIONS(MIDR_THUNDERX),
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@ -919,14 +933,12 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
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ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_2457168
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#ifdef CONFIG_ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT
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{
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.desc = "ARM erratum 2457168",
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.capability = ARM64_WORKAROUND_2457168,
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.desc = "Broken AMU AMEVCNTR01 (const counter)",
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.capability = ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT,
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.type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
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/* Cortex-A510 r0p0-r1p1 */
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CAP_MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1)
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CAP_MIDR_RANGE_LIST(workaround_amu_constcnt_list)
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},
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_2038923
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@ -2089,7 +2089,7 @@ static void cpu_amu_enable(struct arm64_cpu_capabilities const *cap)
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cpumask_set_cpu(smp_processor_id(), &amu_cpus);
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/* 0 reference values signal broken/disabled counters */
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if (!this_cpu_has_cap(ARM64_WORKAROUND_2457168))
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if (!this_cpu_has_cap(ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT))
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update_freq_counters_refs();
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}
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}
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@ -433,6 +433,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
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unsigned int vl, vq;
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struct user_fpsimd_state fpsimd;
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u16 user_vl, flags;
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bool fpsimd_only;
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bool sm;
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if (user->sve_size < sizeof(*user->sve))
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@ -443,19 +444,33 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
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if (err)
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return err;
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fpsimd_only = (user->sve_size == sizeof(*user->sve));
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sm = flags & SVE_SIG_FLAG_SM;
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if (sm) {
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if (!system_supports_sme())
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return -EINVAL;
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/*
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* Streaming SVE state is always preserved with an SVE payload.
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* Only accept streaming state which has an SVE payload.
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*/
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if (fpsimd_only)
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return -EINVAL;
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vl = task_get_sme_vl(current);
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} else {
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/*
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* A SME only system use SVE for streaming mode so can
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* have a SVE formatted context with a zero VL and no
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* payload data.
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* Non-streaming SVE state may be preserved without an SVE
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* payload, in which case all state is saved in the FPSIMD
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* context.
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*
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* On SME-only systems, non-streaming (FPSIMD-only) state is
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* always preserved without an SVE payload, and with VL==0. On
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* such systems, only accept non-streaming state without an SVE
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* payload.
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*/
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if (!system_supports_sve() && !system_supports_sme())
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if (!system_supports_sve() && !fpsimd_only)
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return -EINVAL;
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vl = task_get_sve_vl(current);
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@ -464,16 +479,7 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
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if (user_vl != vl)
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return -EINVAL;
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/*
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* Non-streaming SVE state may be preserved without an SVE payload, in
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* which case the SVE context only has a header with VL==0, and all
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* state can be restored from the FPSIMD context.
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*
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* Streaming SVE state is always preserved with an SVE payload. For
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* consistency and robustness, reject restoring streaming SVE state
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* without an SVE payload.
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*/
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if (!sm && user->sve_size == sizeof(*user->sve))
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if (fpsimd_only)
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return restore_fpsimd_context(user);
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vq = sve_vq_from_vl(vl);
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@ -186,7 +186,6 @@ int arch_freq_get_on_cpu(int cpu)
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struct amu_cntr_sample *amu_sample;
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unsigned int start_cpu = cpu;
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unsigned long last_update;
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unsigned int freq = 0;
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u64 scale;
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if (!amu_fie_cpu_supported(cpu) || !arch_scale_freq_ref(cpu))
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@ -245,9 +244,8 @@ int arch_freq_get_on_cpu(int cpu)
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* (see amu_scale_freq_tick for details)
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*/
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scale = arch_scale_freq_capacity(cpu);
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freq = scale * arch_scale_freq_ref(cpu);
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freq >>= SCHED_CAPACITY_SHIFT;
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return freq;
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return (scale * arch_scale_freq_ref(cpu)) >> SCHED_CAPACITY_SHIFT;
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}
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static void amu_fie_setup(const struct cpumask *cpus)
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@ -397,12 +395,13 @@ static void cpu_read_corecnt(void *val)
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static void cpu_read_constcnt(void *val)
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{
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/*
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* Return 0 if the current CPU is affected by erratum 2457168. A value
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* of 0 is also returned if the current CPU does not support AMUs or if
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* the counter is disabled. A return value of 0 at counter read is
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* properly handled as an error case by the users of the counter.
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* Return 0 if the current CPU is affected by a HW erratum.
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* A value of 0 is also returned if the current CPU does not
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* support AMUs or if the counter is disabled. A return
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* value of 0 at counter read is properly handled as an error
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* case by the users of the counter.
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*/
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*(u64 *)val = this_cpu_has_cap(ARM64_WORKAROUND_2457168) ?
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*(u64 *)val = this_cpu_has_cap(ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT) ?
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0UL : read_constcnt();
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}
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@ -463,8 +462,9 @@ static void amu_read_core_const_ctrs(void *val)
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/*
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* cpu_read_constcnt() incurs slight latency due to the
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* ARM64_WORKAROUND_2457168 check. Read it first to minimize
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* the sampling skew between the const and core counters.
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* ARM64_WORKAROUND_BROKEN_AMU_CONSTCNT check.
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* Read it first to minimize the sampling skew between the const
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* and core counters.
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*/
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cpu_read_constcnt(&ctrs->constcnt);
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cpu_read_corecnt(&ctrs->corecnt);
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@ -2295,7 +2295,7 @@ pte_t modify_prot_start_ptes(struct vm_area_struct *vma, unsigned long addr,
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* in cases where cpu is affected with errata #2645198.
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*/
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if (pte_accessible(vma->vm_mm, pte) && pte_user_exec(pte))
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__flush_tlb_range(vma, addr, nr * PAGE_SIZE,
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__flush_tlb_range(vma, addr, addr + nr * PAGE_SIZE,
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PAGE_SIZE, 3, TLBF_NOWALKCACHE);
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}
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@ -105,7 +105,6 @@ WORKAROUND_1902691
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WORKAROUND_2038923
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WORKAROUND_2064142
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WORKAROUND_2077057
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WORKAROUND_2457168
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WORKAROUND_2645198
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WORKAROUND_2658417
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WORKAROUND_4193714
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@ -132,3 +131,4 @@ WORKAROUND_REPEAT_TLBI_SYNC
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WORKAROUND_SPECULATIVE_AT
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WORKAROUND_SPECULATIVE_SSBS
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WORKAROUND_SPECULATIVE_UNPRIV_LOAD
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WORKAROUND_BROKEN_AMU_CONSTCNT
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