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media: dt-bindings: Add binding doc for i.MX8QXP and i.MX8QM ISI
Add binding documentation for i.MX8QXP and i.MX8QM ISI. The clock-names, power-domains, and ports differ significantly from the existing nxp,imx8-isi.yaml. Create a new file to avoid complex if-else branches. Add new file to MAINTAINERS. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250522-8qxp_camera-v5-1-d4be869fdb7e@nxp.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
This commit is contained in:
Frank Li
Hans Verkuil
parent
038d27acf9
commit
c4891010d8
117
Documentation/devicetree/bindings/media/fsl,imx8qm-isi.yaml
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117
Documentation/devicetree/bindings/media/fsl,imx8qm-isi.yaml
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@ -0,0 +1,117 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/fsl,imx8qm-isi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX8QM Image Sensing Interface
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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description:
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The Image Sensing Interface (ISI) combines image processing pipelines with
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DMA engines to process and capture frames originating from a variety of
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sources. The inputs to the ISI go through Pixel Link interfaces, and their
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number and nature is SoC-dependent. They cover both capture interfaces (MIPI
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CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
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properties:
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compatible:
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enum:
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- fsl,imx8qm-isi
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reg:
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maxItems: 1
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clocks:
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maxItems: 8
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clock-names:
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items:
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- const: per0
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- const: per1
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- const: per2
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- const: per3
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- const: per4
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- const: per5
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- const: per6
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- const: per7
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interrupts:
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maxItems: 8
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power-domains:
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maxItems: 8
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description: MIPI CSI-2 RX 0
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port@3:
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$ref: /schemas/graph.yaml#/properties/port
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description: MIPI CSI-2 RX 1
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port@4:
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$ref: /schemas/graph.yaml#/properties/port
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description: HDMI RX
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- power-domains
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/imx8-clock.h>
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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image-controller@58100000 {
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compatible = "fsl,imx8qm-isi";
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reg = <0x58100000 0x80000>;
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interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pdma0_lpcg IMX_LPCG_CLK_0>,
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<&pdma1_lpcg IMX_LPCG_CLK_0>,
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<&pdma2_lpcg IMX_LPCG_CLK_0>,
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<&pdma3_lpcg IMX_LPCG_CLK_0>,
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<&pdma4_lpcg IMX_LPCG_CLK_0>,
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<&pdma5_lpcg IMX_LPCG_CLK_0>,
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<&pdma6_lpcg IMX_LPCG_CLK_0>,
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<&pdma7_lpcg IMX_LPCG_CLK_0>;
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clock-names = "per0", "per1", "per2", "per3",
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"per4", "per5", "per6", "per7";
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power-domains = <&pd IMX_SC_R_ISI_CH0>, <&pd IMX_SC_R_ISI_CH1>,
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<&pd IMX_SC_R_ISI_CH2>, <&pd IMX_SC_R_ISI_CH3>,
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<&pd IMX_SC_R_ISI_CH4>, <&pd IMX_SC_R_ISI_CH5>,
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<&pd IMX_SC_R_ISI_CH6>, <&pd IMX_SC_R_ISI_CH7>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@2 {
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reg = <2>;
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endpoint {
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remote-endpoint = <&mipi_csi0_out>;
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};
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};
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};
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};
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...
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106
Documentation/devicetree/bindings/media/fsl,imx8qxp-isi.yaml
Normal file
106
Documentation/devicetree/bindings/media/fsl,imx8qxp-isi.yaml
Normal file
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@ -0,0 +1,106 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/fsl,imx8qxp-isi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: i.MX8QXP Image Sensing Interface
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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description:
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The Image Sensing Interface (ISI) combines image processing pipelines with
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DMA engines to process and capture frames originating from a variety of
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sources. The inputs to the ISI go through Pixel Link interfaces, and their
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number and nature is SoC-dependent. They cover both capture interfaces (MIPI
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CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
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properties:
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compatible:
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enum:
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- fsl,imx8qxp-isi
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reg:
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maxItems: 1
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clocks:
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maxItems: 6
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clock-names:
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items:
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- const: per0
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- const: per1
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- const: per2
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- const: per3
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- const: per4
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- const: per5
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interrupts:
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maxItems: 6
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power-domains:
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maxItems: 6
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description: MIPI CSI-2 RX 0
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port@6:
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$ref: /schemas/graph.yaml#/properties/port
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description: CSI-2 Parallel RX
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- power-domains
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/imx8-clock.h>
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#include <dt-bindings/clock/imx8-lpcg.h>
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#include <dt-bindings/firmware/imx/rsrc.h>
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image-controller@58100000 {
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compatible = "fsl,imx8qxp-isi";
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reg = <0x58100000 0x60000>;
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interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pdma0_lpcg IMX_LPCG_CLK_0>,
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<&pdma1_lpcg IMX_LPCG_CLK_0>,
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<&pdma2_lpcg IMX_LPCG_CLK_0>,
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<&pdma3_lpcg IMX_LPCG_CLK_0>,
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<&pdma4_lpcg IMX_LPCG_CLK_0>,
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<&pdma5_lpcg IMX_LPCG_CLK_0>;
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clock-names = "per0", "per1", "per2", "per3", "per4", "per5";
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power-domains = <&pd IMX_SC_R_ISI_CH0>, <&pd IMX_SC_R_ISI_CH1>,
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<&pd IMX_SC_R_ISI_CH2>, <&pd IMX_SC_R_ISI_CH3>,
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<&pd IMX_SC_R_ISI_CH4>, <&pd IMX_SC_R_ISI_CH5>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@2 {
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reg = <2>;
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endpoint {
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remote-endpoint = <&mipi_csi0_out>;
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};
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};
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};
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};
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...
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@ -17906,6 +17906,7 @@ NXP i.MX 8M ISI DRIVER
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M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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L: linux-media@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/media/fsl,imx8*-isi.yaml
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F: Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml
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F: drivers/media/platform/nxp/imx8-isi/
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