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arm64: dts: ti: k3-am65: Enable remote processors at board level
Remote Processors defined in top-level AM65x SoC dtsi files are incomplete without the memory carveouts and mailbox assignments which are only known at board integration level. Therefore, disable the remote processors at SoC level and enable them at board level where above information is available. Signed-off-by: Beleswar Padhi <b-padhi@ti.com> Acked-by: Andrew Davis <afd@ti.com> Link: https://patch.msgid.link/20250908142826.1828676-10-b-padhi@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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@ -602,16 +602,22 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
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};
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};
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&mcu_r5fss0 {
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status = "okay";
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};
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&mcu_r5fss0_core0 {
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memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
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<&mcu_r5fss0_core0_memory_region>;
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mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
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status = "okay";
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};
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&mcu_r5fss0_core1 {
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memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
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<&mcu_r5fss0_core1_memory_region>;
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mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
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status = "okay";
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};
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&mcu_rti1 {
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@ -408,6 +408,7 @@ mcu_r5fss0: r5fss@41000000 {
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ranges = <0x41000000 0x00 0x41000000 0x20000>,
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<0x41400000 0x00 0x41400000 0x20000>;
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power-domains = <&k3_pds 129 TI_SCI_PD_EXCLUSIVE>;
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status = "disabled";
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mcu_r5fss0_core0: r5f@41000000 {
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compatible = "ti,am654-r5f";
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@ -422,6 +423,7 @@ mcu_r5fss0_core0: r5f@41000000 {
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ti,atcm-enable = <1>;
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ti,btcm-enable = <1>;
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ti,loczrama = <1>;
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status = "disabled";
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};
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mcu_r5fss0_core1: r5f@41400000 {
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@ -437,6 +439,7 @@ mcu_r5fss0_core1: r5f@41400000 {
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ti,atcm-enable = <1>;
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ti,btcm-enable = <1>;
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ti,loczrama = <1>;
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status = "disabled";
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};
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};
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@ -541,16 +541,22 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
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};
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};
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&mcu_r5fss0 {
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status = "okay";
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};
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&mcu_r5fss0_core0 {
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memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
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<&mcu_r5fss0_core0_memory_region>;
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mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
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status = "okay";
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};
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&mcu_r5fss0_core1 {
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memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
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<&mcu_r5fss0_core1_memory_region>;
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mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
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status = "okay";
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};
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&ospi0 {
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