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arm64: dts: qcom: msm8996: Add BLSP2_I2C5 and BLSP2_I2C6

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Add the fifth and sixth I2C host on the second BLSP, used for
various board-specific peripherals.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210228130831.203765-5-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Konrad Dybcio 2021-02-28 14:08:23 +01:00 committed by Bjorn Andersson
parent fbb8a3a8b7
commit c33d9068a7
1 changed files with 29 additions and 0 deletions
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29
arch/arm64/boot/dts/qcom/msm8996.dtsi
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@ -2439,6 +2439,35 @@ blsp2_i2c2: i2c@75b6000 {
status = "disabled";
};
blsp2_i2c5: i2c@75b9000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x75b9000 0x1000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default";
pinctrl-0 = <&blsp2_i2c5_default>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
blsp2_i2c6: i2c@75ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x75ba000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_AHB_CLK>,
<&gcc GCC_BLSP2_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&blsp2_i2c6_default>;
pinctrl-1 = <&blsp2_i2c6_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
blsp2_spi6: spi@75ba000{
compatible = "qcom,spi-qup-v2.2.1";
reg = <0x075ba000 0x600>;