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Microblaze patches for 7.4-rc1

Browse Source 
- Add Kunit support
 - Update signal handling
 
 Small changes:
 - coding style, typos
 - don't use "new" ASM pseudocode
 - fix refcount leak in cpuinfo code
 - prevent ptrace writes to MSR and pt_mode
 - enable Xilinx DMA driver by default
 - build userprogs for the correct endianness
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Merge tag 'microblaze-v7.4' of git://git.monstr.eu/linux-2.6-microblaze

Pull arch/microblaze updates from Michal Simek:
 "Some issues were found by AI but nothing dramatic.

  The signal changes are related to upgrading the toolchains supported
  by AMD. Hardened MicroBlaze cores are used in AMD/Xilinx chips, and
  they will be supported for another 10+ years. New tests were run as
  part of this effort, and that's how the signal stack issues were
  found.

  The KUnit patches have been reviewed by David, and he agreed that they
  can go through my tree.

  Summary:
   - Add Kunit support
   - Update signal handling

  Small changes:
   - coding style, typos
   - don't use "new" ASM pseudocode
   - fix refcount leak in cpuinfo code
   - prevent ptrace writes to MSR and pt_mode
   - enable Xilinx DMA driver by default
   - build userprogs for the correct endianness"

* tag 'microblaze-v7.4' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: Build userprogs for the correct endianness
  microblaze: Enable xilinx dmas and axi emac drivers
  kunit: qemu_configs: Add microblaze configurations
  microblaze: reset: Provide a power off handler through an unaligned PC
  microblaze: reset: Call POWER_OFF handlers
  microblaze: Pass -m{big,little}-endian through KBUILD_CPPFLAGS
  microblaze: uaccess: Zero out destination on failed get_user()
  microblaze: fix typo "multipler" in comment
  microblaze: prevent ptrace writes to MSR and pt_mode
  microblaze: CCF: fix refcount leak
  microblaze: preserve the MSR carry flags across signals
  microblaze: restore the ABI argument home area below pt_regs (PTO)
  microblaze: don't clobber r3/r4 restored by rt_sigreturn
  microblaze: reserve the ABI argument-home area in the signal frame
  microblaze: wire up sigaltstack
  microblaze: drop unneeded semicolon
  microblaze: Fix MB_MANAGER build with older binutils
This commit is contained in:
Linus Torvalds 2026-10-20 07:52:21 -10:00
commit c3134590a8
18 changed files with 339 additions and 176 deletions
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20
arch/microblaze/Kconfig
View File

@ -3,6 +3,7 @@ config MICROBLAZE
def_bool y
select ARCH_32BIT_OFF_T
select ARCH_NO_SWAP
select ARCH_HAS_CC_CAN_LINK
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SYNC_DMA_FOR_CPU
@ -216,3 +217,22 @@ config MB_MANAGER
Say N here unless you know what you are doing.
endmenu
config MB_POWER_OFF_THROUGH_UNALIGNED_PC
bool "Power off through unaligned PC"
help
This options adds a power off handler which executes an unaligned PC
so the machine resets in a generic way. This works for the
petalogix-s3adsp1800 QEMU machine.
Say N here unless you know what you are doing.
config ARCH_CC_CAN_LINK
bool
default $(cc_can_link_user,-mlittle-endian) if CPU_LITTLE_ENDIAN
default $(cc_can_link_user,-mbig-endian) if CPU_BIG_ENDIAN
config ARCH_USERFLAGS
string
default "-mlittle-endian" if CPU_LITTLE_ENDIAN
default "-mbig-endian" if CPU_BIG_ENDIAN

8
arch/microblaze/Makefile
View File

@ -16,7 +16,7 @@ export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV
# The various CONFIG_XILINX cpu features options are integers 0/1/2...
# rather than bools y/n
# Work out HW multipler support. This is tricky.
# Work out HW multiplier support. This is tricky.
# 1. Spartan2 has no HW multipliers.
# 2. MicroBlaze v3.x always uses them, except in Spartan 2
# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
@ -34,12 +34,10 @@ CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
ifdef CONFIG_CPU_BIG_ENDIAN
KBUILD_CFLAGS += -mbig-endian
KBUILD_AFLAGS += -mbig-endian
KBUILD_CPPFLAGS += -mbig-endian
KBUILD_LDFLAGS += -EB
else
KBUILD_CFLAGS += -mlittle-endian
KBUILD_AFLAGS += -mlittle-endian
KBUILD_CPPFLAGS += -mlittle-endian
KBUILD_LDFLAGS += -EL
endif

2
arch/microblaze/configs/mmu_defconfig
View File

@ -70,6 +70,8 @@ CONFIG_XILINX_WATCHDOG=y
CONFIG_FB=y
CONFIG_FB_XILINX=y
# CONFIG_USB_SUPPORT is not set
CONFIG_DMADEVICES=y
CONFIG_XILINX_DMA=y
CONFIG_UIO=y
CONFIG_UIO_PDRV_GENIRQ=y
CONFIG_UIO_DMEM_GENIRQ=y

13
arch/microblaze/include/asm/entry.h
View File

@ -21,6 +21,19 @@
#define PER_CPU(var) var
/*
* The MicroBlaze ABI has the caller reserve an argument home area:
* REG_PARM_STACK_SPACE is 24 and OUTGOING_REG_PARM_STACK_SPACE is 1, so a
* callee may write to [caller_sp + 4, caller_sp + 28). The kernel calls C
* with r1 at the frame base, so reserve that area below pt_regs and reach
* the saved registers through PTO. This restores what 6e83557c38b4
* ("microblaze: Remove r0_ram pointer and PTO alignment") removed; the old
* value of 24 was one word short and left the last argument slot
* overlapping pt_regs' r0.
*/
#define PTO 28
#define STATE_SAVE_SIZE (PT_SIZE + PTO)
# ifndef __ASSEMBLER__
DECLARE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
DECLARE_PER_CPU(unsigned int, KM); /* Kernel/user mode */

2
arch/microblaze/include/asm/processor.h
View File

@ -73,7 +73,7 @@ unsigned long __get_wchan(struct task_struct *p);
# define task_regs(task) ((struct pt_regs *)task_tos(task) - 1)
# define task_pt_regs_plus_args(tsk) \
((void *)task_pt_regs(tsk))
(((void *)task_pt_regs(tsk)) - PTO)
# define task_sp(task) (task_regs(task)->r1)
# define task_pc(task) (task_regs(task)->pc)

3
arch/microblaze/include/asm/uaccess.h
View File

@ -95,7 +95,8 @@ extern long __user_bad(void);
#define get_user(x, ptr) ({ \
const typeof(*(ptr)) __user *__gu_ptr = (ptr); \
access_ok(__gu_ptr, sizeof(*__gu_ptr)) ? \
__get_user(x, __gu_ptr) : -EFAULT; \
__get_user(x, __gu_ptr) : \
((x) = 0, -EFAULT); \
})
#define __get_user(x, ptr) \

2
arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
View File

@ -23,7 +23,7 @@
#define CI(c, p) { ci->c = PVR_##p(pvr); }
#define err_printk(x) \
pr_err("ERROR: Microblaze " x "-different for PVR and DTS\n");
pr_err("ERROR: Microblaze " x "-different for PVR and DTS\n")
void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
{

2
arch/microblaze/kernel/cpu/cpuinfo-static.c
View File

@ -18,7 +18,7 @@ static const char family_string[] = CONFIG_XILINX_MICROBLAZE0_FAMILY;
static const char cpu_ver_string[] = CONFIG_XILINX_MICROBLAZE0_HW_VER;
#define err_printk(x) \
pr_err("ERROR: Microblaze " x "-different for kernel and DTS\n");
pr_err("ERROR: Microblaze " x "-different for kernel and DTS\n")
void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
{

1
arch/microblaze/kernel/cpu/cpuinfo.c
View File

@ -133,6 +133,7 @@ void __init setup_cpuinfo_clk(void)
cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency");
} else {
cpuinfo.cpu_clock_freq = clk_get_rate(clk);
clk_put(clk);
}
if (!cpuinfo.cpu_clock_freq) {

348
arch/microblaze/kernel/entry.S
View File

@ -177,78 +177,78 @@ syscall_debug_table:
1:
#define SAVE_REGS \
swi r2, r1, PT_R2; /* Save SDA */ \
swi r3, r1, PT_R3; \
swi r4, r1, PT_R4; \
swi r5, r1, PT_R5; \
swi r6, r1, PT_R6; \
swi r7, r1, PT_R7; \
swi r8, r1, PT_R8; \
swi r9, r1, PT_R9; \
swi r10, r1, PT_R10; \
swi r11, r1, PT_R11; /* save clobbered regs after rval */\
swi r12, r1, PT_R12; \
swi r13, r1, PT_R13; /* Save SDA2 */ \
swi r14, r1, PT_PC; /* PC, before IRQ/trap */ \
swi r15, r1, PT_R15; /* Save LP */ \
swi r16, r1, PT_R16; \
swi r17, r1, PT_R17; \
swi r18, r1, PT_R18; /* Save asm scratch reg */ \
swi r19, r1, PT_R19; \
swi r20, r1, PT_R20; \
swi r21, r1, PT_R21; \
swi r22, r1, PT_R22; \
swi r23, r1, PT_R23; \
swi r24, r1, PT_R24; \
swi r25, r1, PT_R25; \
swi r26, r1, PT_R26; \
swi r27, r1, PT_R27; \
swi r28, r1, PT_R28; \
swi r29, r1, PT_R29; \
swi r30, r1, PT_R30; \
swi r31, r1, PT_R31; /* Save current task reg */ \
swi r2, r1, PTO+PT_R2; /* Save SDA */ \
swi r3, r1, PTO+PT_R3; \
swi r4, r1, PTO+PT_R4; \
swi r5, r1, PTO+PT_R5; \
swi r6, r1, PTO+PT_R6; \
swi r7, r1, PTO+PT_R7; \
swi r8, r1, PTO+PT_R8; \
swi r9, r1, PTO+PT_R9; \
swi r10, r1, PTO+PT_R10; \
swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\
swi r12, r1, PTO+PT_R12; \
swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \
swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \
swi r15, r1, PTO+PT_R15; /* Save LP */ \
swi r16, r1, PTO+PT_R16; \
swi r17, r1, PTO+PT_R17; \
swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \
swi r19, r1, PTO+PT_R19; \
swi r20, r1, PTO+PT_R20; \
swi r21, r1, PTO+PT_R21; \
swi r22, r1, PTO+PT_R22; \
swi r23, r1, PTO+PT_R23; \
swi r24, r1, PTO+PT_R24; \
swi r25, r1, PTO+PT_R25; \
swi r26, r1, PTO+PT_R26; \
swi r27, r1, PTO+PT_R27; \
swi r28, r1, PTO+PT_R28; \
swi r29, r1, PTO+PT_R29; \
swi r30, r1, PTO+PT_R30; \
swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
mfs r11, rmsr; /* save MSR */ \
swi r11, r1, PT_MSR;
swi r11, r1, PTO+PT_MSR;
#define RESTORE_REGS_GP \
lwi r2, r1, PT_R2; /* restore SDA */ \
lwi r3, r1, PT_R3; \
lwi r4, r1, PT_R4; \
lwi r5, r1, PT_R5; \
lwi r6, r1, PT_R6; \
lwi r7, r1, PT_R7; \
lwi r8, r1, PT_R8; \
lwi r9, r1, PT_R9; \
lwi r10, r1, PT_R10; \
lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\
lwi r12, r1, PT_R12; \
lwi r13, r1, PT_R13; /* restore SDA2 */ \
lwi r14, r1, PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
lwi r15, r1, PT_R15; /* restore LP */ \
lwi r16, r1, PT_R16; \
lwi r17, r1, PT_R17; \
lwi r18, r1, PT_R18; /* restore asm scratch reg */ \
lwi r19, r1, PT_R19; \
lwi r20, r1, PT_R20; \
lwi r21, r1, PT_R21; \
lwi r22, r1, PT_R22; \
lwi r23, r1, PT_R23; \
lwi r24, r1, PT_R24; \
lwi r25, r1, PT_R25; \
lwi r26, r1, PT_R26; \
lwi r27, r1, PT_R27; \
lwi r28, r1, PT_R28; \
lwi r29, r1, PT_R29; \
lwi r30, r1, PT_R30; \
lwi r31, r1, PT_R31; /* Restore cur task reg */
lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
lwi r3, r1, PTO+PT_R3; \
lwi r4, r1, PTO+PT_R4; \
lwi r5, r1, PTO+PT_R5; \
lwi r6, r1, PTO+PT_R6; \
lwi r7, r1, PTO+PT_R7; \
lwi r8, r1, PTO+PT_R8; \
lwi r9, r1, PTO+PT_R9; \
lwi r10, r1, PTO+PT_R10; \
lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\
lwi r12, r1, PTO+PT_R12; \
lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \
lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
lwi r15, r1, PTO+PT_R15; /* restore LP */ \
lwi r16, r1, PTO+PT_R16; \
lwi r17, r1, PTO+PT_R17; \
lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \
lwi r19, r1, PTO+PT_R19; \
lwi r20, r1, PTO+PT_R20; \
lwi r21, r1, PTO+PT_R21; \
lwi r22, r1, PTO+PT_R22; \
lwi r23, r1, PTO+PT_R23; \
lwi r24, r1, PTO+PT_R24; \
lwi r25, r1, PTO+PT_R25; \
lwi r26, r1, PTO+PT_R26; \
lwi r27, r1, PTO+PT_R27; \
lwi r28, r1, PTO+PT_R28; \
lwi r29, r1, PTO+PT_R29; \
lwi r30, r1, PTO+PT_R30; \
lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */
#define RESTORE_REGS \
lwi r11, r1, PT_MSR; \
lwi r11, r1, PTO+PT_MSR; \
mts rmsr , r11; \
RESTORE_REGS_GP
#define RESTORE_REGS_RTBD \
lwi r11, r1, PT_MSR; \
lwi r11, r1, PTO+PT_MSR; \
andni r11, r11, MSR_EIP; /* clear EIP */ \
ori r11, r11, MSR_EE | MSR_BIP; /* set EE and BIP */ \
mts rmsr , r11; \
@ -265,11 +265,11 @@ syscall_debug_table:
lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
/* FIXME: I can add these two lines to one */ \
/* tophys(r1,r1); */ \
/* addik r1, r1, -PT_SIZE; */ \
addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
/* addik r1, r1, -STATE_SAVE_SIZE; */ \
addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
SAVE_REGS \
brid 2f; \
swi r1, r1, PT_MODE; \
swi r1, r1, PTO+PT_MODE; \
1: /* User-mode state save. */ \
lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
tophys(r1,r1); \
@ -277,12 +277,13 @@ syscall_debug_table:
/* MS these three instructions can be added to one */ \
/* addik r1, r1, THREAD_SIZE; */ \
/* tophys(r1,r1); */ \
/* addik r1, r1, -PT_SIZE; */ \
addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
/* addik r1, r1, -STATE_SAVE_SIZE; */ \
addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR \
- CONFIG_KERNEL_START - STATE_SAVE_SIZE; \
SAVE_REGS \
lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
swi r11, r1, PT_R1; /* Store user SP. */ \
swi r0, r1, PT_MODE; /* Was in user-mode. */ \
swi r11, r1, PTO+PT_R1; /* Store user SP. */ \
swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ \
/* MS: I am clearing UMS even in case when I come from kernel space */ \
clear_ums; \
2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
@ -292,7 +293,7 @@ syscall_debug_table:
.extern cpuinfo
C_ENTRY(mb_flush_dcache):
addik r1, r1, -PT_SIZE
addik r1, r1, -STATE_SAVE_SIZE
SAVE_REGS
addik r3, r0, cpuinfo
@ -305,12 +306,12 @@ C_ENTRY(mb_flush_dcache):
addk r9, r9, r8
RESTORE_REGS
addik r1, r1, PT_SIZE
addik r1, r1, STATE_SAVE_SIZE
rtsd r15, 8
nop
C_ENTRY(mb_invalidate_icache):
addik r1, r1, -PT_SIZE
addik r1, r1, -STATE_SAVE_SIZE
SAVE_REGS
addik r3, r0, cpuinfo
@ -323,7 +324,7 @@ C_ENTRY(mb_invalidate_icache):
addk r9, r9, r8
RESTORE_REGS
addik r1, r1, PT_SIZE
addik r1, r1, STATE_SAVE_SIZE
rtsd r15, 8
nop
@ -350,18 +351,18 @@ C_ENTRY(_user_exception):
addik r1, r1, THREAD_SIZE;
tophys(r1,r1);
addik r1, r1, -PT_SIZE; /* Make room on the stack. */
addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
SAVE_REGS
swi r0, r1, PT_R3
swi r0, r1, PT_R4
swi r0, r1, PTO+PT_R3
swi r0, r1, PTO+PT_R4
swi r0, r1, PT_MODE; /* Was in user-mode. */
swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
swi r11, r1, PT_R1; /* Store user SP. */
swi r11, r1, PTO+PT_R1; /* Store user SP. */
clear_ums;
2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
/* Save away the syscall number. */
swi r12, r1, PT_R0;
swi r12, r1, PTO+PT_R0;
tovirt(r1,r1)
/* where the trap should return need -8 to adjust for rtsd r15, 8*/
@ -380,18 +381,18 @@ C_ENTRY(_user_exception):
beqi r11, 4f
addik r3, r0, -ENOSYS
swi r3, r1, PT_R3
swi r3, r1, PTO+PT_R3
brlid r15, do_syscall_trace_enter
addik r5, r1, PT_R0
addik r5, r1, PTO+PT_R0
# do_syscall_trace_enter returns the new syscall nr.
addk r12, r0, r3
lwi r5, r1, PT_R5;
lwi r6, r1, PT_R6;
lwi r7, r1, PT_R7;
lwi r8, r1, PT_R8;
lwi r9, r1, PT_R9;
lwi r10, r1, PT_R10;
lwi r5, r1, PTO+PT_R5;
lwi r6, r1, PTO+PT_R6;
lwi r7, r1, PTO+PT_R7;
lwi r8, r1, PTO+PT_R8;
lwi r9, r1, PTO+PT_R9;
lwi r10, r1, PTO+PT_R10;
4:
/* Jump to the appropriate function for the system call number in r12
* (r12 is not preserved), or return an error if r12 is not valid.
@ -432,10 +433,16 @@ C_ENTRY(_user_exception):
/* Entry point used to return from a syscall/trap */
/* We re-enable BIP bit before state restore */
C_ENTRY(ret_from_trap):
swi r3, r1, PT_R3
swi r4, r1, PT_R4
lwi r11, r1, PT_MODE;
swi r3, r1, PTO+PT_R3
swi r4, r1, PTO+PT_R4
/*
* Entry point for returns that must not store r3/r4 back into pt_regs,
* i.e. rt_sigreturn, which has already restored them from the signal
* context. Reached as "rtsd r15, 8" with r15 set to this label minus 8,
* so it stays correct if the number of stores above ever changes.
*/
ret_from_trap_no_rval:
lwi r11, r1, PTO+PT_MODE;
/* See if returning to kernel mode, if so, skip resched &c. */
bnei r11, 2f;
/* We're returning to user mode, so check for various conditions that
@ -447,7 +454,7 @@ C_ENTRY(ret_from_trap):
beqi r11, 1f
brlid r15, do_syscall_trace_leave
addik r5, r1, PT_R0
addik r5, r1, PTO+PT_R0
1:
/* We're returning to user mode, so check for various conditions that
* trigger rescheduling. */
@ -466,7 +473,7 @@ C_ENTRY(ret_from_trap):
andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
beqi r11, 4f; /* Signals to handle, handle them */
addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
bralid r15, do_notify_resume; /* Handle any signals */
add r6, r30, r0; /* Arg 2: int in_syscall */
add r30, r0, r0 /* no more restarts */
@ -478,7 +485,11 @@ C_ENTRY(ret_from_trap):
VM_OFF;
tophys(r1,r1);
RESTORE_REGS_RTBD;
addik r1, r1, PT_SIZE /* Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
/*
* Deliberately PT_SIZE, not STATE_SAVE_SIZE: r1 is back at the stack
* top, so PTO cancels and the saved SP sits at PT_R1 - PT_SIZE.
*/
lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
bri 6f;
@ -487,7 +498,7 @@ C_ENTRY(ret_from_trap):
VM_OFF;
tophys(r1,r1);
RESTORE_REGS_RTBD;
addik r1, r1, PT_SIZE /* Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
tovirt(r1,r1);
6:
TRAP_return: /* Make global symbol for debugging */
@ -518,8 +529,17 @@ C_ENTRY(ret_from_kernel_thread):
C_ENTRY(sys_rt_sigreturn_wrapper):
addik r30, r0, 0 /* no restarts */
/*
* rt_sigreturn restores the full register set from the signal
* context, so it must skip the r3/r4 syscall-return stores at the
* head of ret_from_trap which would otherwise overwrite the
* just-restored r3/r4. Every C function returns with "rtsd r15, 8"
* -- the ABI return, where the 8 skips the caller's branch and its
* delay slot -- so bias r15 by -8 to land on ret_from_trap_no_rval.
*/
addik r15, r0, ret_from_trap_no_rval - 8
brid sys_rt_sigreturn /* Do real work */
addik r5, r1, 0; /* add user context as 1st arg */
addik r5, r1, PTO; /* add user context as 1st arg */
/*
* HW EXCEPTION rutine start
@ -530,7 +550,7 @@ C_ENTRY(full_exception_trap):
addik r17, r17, -4
SAVE_STATE /* Save registers */
/* PC, before IRQ/trap - this is one instruction above */
swi r17, r1, PT_PC;
swi r17, r1, PTO+PT_PC;
tovirt(r1,r1)
/* FIXME this can be store directly in PT_ESR reg.
* I tested it but there is a fault */
@ -540,7 +560,7 @@ C_ENTRY(full_exception_trap):
mfs r7, rfsr; /* save FSR */
mts rfsr, r0; /* Clear sticky fsr */
rted r0, full_exception
addik r5, r1, 0 /* parameter struct pt_regs * regs */
addik r5, r1, PTO /* parameter struct pt_regs * regs */
/*
* Unaligned data trap.
@ -566,14 +586,14 @@ C_ENTRY(unaligned_data_trap):
lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
SAVE_STATE /* Save registers.*/
/* PC, before IRQ/trap - this is one instruction above */
swi r17, r1, PT_PC;
swi r17, r1, PTO+PT_PC;
tovirt(r1,r1)
/* where the trap should return need -8 to adjust for rtsd r15, 8 */
addik r15, r0, ret_from_exc-8
mfs r3, resr /* ESR */
mfs r4, rear /* EAR */
rtbd r0, _unaligned_data_exception
addik r7, r1, 0 /* parameter struct pt_regs * regs */
addik r7, r1, PTO /* parameter struct pt_regs * regs */
/*
* Page fault traps.
@ -596,30 +616,30 @@ C_ENTRY(unaligned_data_trap):
C_ENTRY(page_fault_data_trap):
SAVE_STATE /* Save registers.*/
/* PC, before IRQ/trap - this is one instruction above */
swi r17, r1, PT_PC;
swi r17, r1, PTO+PT_PC;
tovirt(r1,r1)
/* where the trap should return need -8 to adjust for rtsd r15, 8 */
addik r15, r0, ret_from_exc-8
mfs r6, rear /* parameter unsigned long address */
mfs r7, resr /* parameter unsigned long error_code */
rted r0, do_page_fault
addik r5, r1, 0 /* parameter struct pt_regs * regs */
addik r5, r1, PTO /* parameter struct pt_regs * regs */
C_ENTRY(page_fault_instr_trap):
SAVE_STATE /* Save registers.*/
/* PC, before IRQ/trap - this is one instruction above */
swi r17, r1, PT_PC;
swi r17, r1, PTO+PT_PC;
tovirt(r1,r1)
/* where the trap should return need -8 to adjust for rtsd r15, 8 */
addik r15, r0, ret_from_exc-8
mfs r6, rear /* parameter unsigned long address */
ori r7, r0, 0 /* parameter unsigned long error_code */
rted r0, do_page_fault
addik r5, r1, 0 /* parameter struct pt_regs * regs */
addik r5, r1, PTO /* parameter struct pt_regs * regs */
/* Entry point used to return from an exception. */
C_ENTRY(ret_from_exc):
lwi r11, r1, PT_MODE;
lwi r11, r1, PTO+PT_MODE;
bnei r11, 2f; /* See if returning to kernel mode, */
/* ... if so, skip resched &c. */
@ -651,7 +671,7 @@ C_ENTRY(ret_from_exc):
* complete register state. Here we save anything not saved by
* the normal entry sequence, so that it may be safely restored
* (in a possibly modified form) after do_notify_resume returns. */
addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
bralid r15, do_notify_resume; /* Handle any signals */
addi r6, r0, 0; /* Arg 2: int in_syscall */
bri 1b
@ -663,7 +683,7 @@ C_ENTRY(ret_from_exc):
tophys(r1,r1);
RESTORE_REGS_RTBD;
addik r1, r1, PT_SIZE /* Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
bri 6f;
@ -672,7 +692,7 @@ C_ENTRY(ret_from_exc):
VM_OFF;
tophys(r1,r1);
RESTORE_REGS_RTBD;
addik r1, r1, PT_SIZE /* Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
tovirt(r1,r1);
6:
@ -705,10 +725,10 @@ C_ENTRY(_interrupt):
tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
/* save registers */
/* MS: Make room on the stack -> activation record */
addik r1, r1, -PT_SIZE;
addik r1, r1, -STATE_SAVE_SIZE;
SAVE_REGS
brid 2f;
swi r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */
swi r1, r1, PTO+PT_MODE; /* 0 - user mode, 1 - kernel mode */
1:
/* User-mode state save. */
/* MS: get the saved current */
@ -718,23 +738,23 @@ C_ENTRY(_interrupt):
addik r1, r1, THREAD_SIZE;
tophys(r1,r1);
/* save registers */
addik r1, r1, -PT_SIZE;
addik r1, r1, -STATE_SAVE_SIZE;
SAVE_REGS
/* calculate mode */
swi r0, r1, PT_MODE;
swi r0, r1, PTO+PT_MODE;
lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
swi r11, r1, PT_R1;
swi r11, r1, PTO+PT_R1;
clear_ums;
2:
lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
tovirt(r1,r1)
addik r15, r0, irq_call;
irq_call:rtbd r0, do_IRQ;
addik r5, r1, 0;
addik r5, r1, PTO;
/* MS: we are in virtual mode */
ret_from_irq:
lwi r11, r1, PT_MODE;
lwi r11, r1, PTO+PT_MODE;
bnei r11, 2f;
1:
@ -750,7 +770,7 @@ ret_from_irq:
5: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
beqid r11, no_intr_resched
/* Handle a signal return; Pending signals should be in r18. */
addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
bralid r15, do_notify_resume; /* Handle any signals */
addi r6, r0, 0; /* Arg 2: int in_syscall */
bri 1b
@ -763,7 +783,7 @@ no_intr_resched:
VM_OFF;
tophys(r1,r1);
RESTORE_REGS
addik r1, r1, PT_SIZE /* MS: Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
lwi r1, r1, PT_R1 - PT_SIZE;
bri 6f;
/* MS: Return to kernel state. */
@ -786,7 +806,7 @@ restore:
VM_OFF /* MS: turn off MMU */
tophys(r1,r1)
RESTORE_REGS
addik r1, r1, PT_SIZE /* MS: Clean up stack space. */
addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
tovirt(r1,r1);
6:
IRQ_return: /* MS: Make global symbol for debugging */
@ -805,29 +825,29 @@ C_ENTRY(_xtmr_manager_reset):
lwi r1, r0, xmb_manager_stackpointer
/* Restore MSR */
lwi r2, r1, PT_MSR
lwi r2, r1, PTO+PT_MSR
mts rmsr, r2
bri 4
/* restore Special purpose registers */
lwi r2, r1, PT_PID
lwi r2, r1, PTO+PT_PID
mts rpid, r2
lwi r2, r1, PT_TLBI
lwi r2, r1, PTO+PT_TLBI
mts rtlbx, r2
lwi r2, r1, PT_ZPR
lwi r2, r1, PTO+PT_ZPR
mts rzpr, r2
#if CONFIG_XILINX_MICROBLAZE0_USE_FPU
lwi r2, r1, PT_FSR
lwi r2, r1, PTO+PT_FSR
mts rfsr, r2
#endif
/* restore all the tlb's */
addik r3, r0, TOPHYS(tlb_skip)
addik r6, r0, PT_TLBL0
addik r7, r0, PT_TLBH0
addik r6, r0, PTO+PT_TLBL0
addik r7, r0, PTO+PT_TLBH0
restore_tlb:
add r6, r6, r1
add r7, r7, r1
@ -853,9 +873,9 @@ ret_from_reset:
VM_OFF
/* MS: Restore all regs */
RESTORE_REGS
lwi r14, r1, PT_R14
lwi r16, r1, PT_PC
addik r1, r1, PT_SIZE + 36
lwi r14, r1, PTO+PT_R14
lwi r16, r1, PTO+PT_PC
addik r1, r1, STATE_SAVE_SIZE + 36
rtbd r16, 0
nop
@ -870,11 +890,11 @@ C_ENTRY(_xmb_manager_break):
* Reserve memory in the stack for context store/restore
* (which includes memory for storing tlbs (max two tlbs))
*/
addik r1, r1, -PT_SIZE - 36
addik r1, r1, -STATE_SAVE_SIZE - 36
swi r1, r0, xmb_manager_stackpointer
SAVE_REGS
swi r14, r1, PT_R14 /* rewrite saved R14 value */
swi r16, r1, PT_PC; /* PC and r16 are the same */
swi r14, r1, PTO+PT_R14 /* rewrite saved R14 value */
swi r16, r1, PTO+PT_PC; /* PC and r16 are the same */
lwi r6, r0, TOPHYS(xmb_manager_baseaddr)
lwi r7, r0, TOPHYS(xmb_manager_crval)
@ -888,25 +908,25 @@ C_ENTRY(_xmb_manager_break):
/* Save the special purpose registers */
mfs r2, rpid
swi r2, r1, PT_PID
swi r2, r1, PTO+PT_PID
mfs r2, rtlbx
swi r2, r1, PT_TLBI
swi r2, r1, PTO+PT_TLBI
mfs r2, rzpr
swi r2, r1, PT_ZPR
swi r2, r1, PTO+PT_ZPR
#if CONFIG_XILINX_MICROBLAZE0_USE_FPU
mfs r2, rfsr
swi r2, r1, PT_FSR
swi r2, r1, PTO+PT_FSR
#endif
mfs r2, rmsr
swi r2, r1, PT_MSR
swi r2, r1, PTO+PT_MSR
/* Save all the tlb's */
addik r3, r0, TOPHYS(tlb_skip)
addik r6, r0, PT_TLBL0
addik r7, r0, PT_TLBH0
addik r6, r0, PTO+PT_TLBL0
addik r7, r0, PTO+PT_TLBH0
save_tlb:
add r6, r6, r1
add r7, r7, r1
@ -943,7 +963,7 @@ ret_from_break:
mbar 1
mbar 2
bri 4
suspend
mbar 24 /* suspend */
nop
#endif
@ -963,28 +983,28 @@ C_ENTRY(_debug_exception):
lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
/* BIP bit is set on entry, no interrupts can occur */
addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE;
addik r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - STATE_SAVE_SIZE;
SAVE_REGS;
/* save all regs to pt_reg structure */
swi r0, r1, PT_R0; /* R0 must be saved too */
swi r14, r1, PT_R14 /* rewrite saved R14 value */
swi r16, r1, PT_PC; /* PC and r16 are the same */
swi r0, r1, PTO+PT_R0; /* R0 must be saved too */
swi r14, r1, PTO+PT_R14 /* rewrite saved R14 value */
swi r16, r1, PTO+PT_PC; /* PC and r16 are the same */
/* save special purpose registers to pt_regs */
mfs r11, rear;
swi r11, r1, PT_EAR;
swi r11, r1, PTO+PT_EAR;
mfs r11, resr;
swi r11, r1, PT_ESR;
swi r11, r1, PTO+PT_ESR;
mfs r11, rfsr;
swi r11, r1, PT_FSR;
swi r11, r1, PTO+PT_FSR;
/* stack pointer is in physical address at it is decrease
* by PT_SIZE but we need to get correct R1 value */
addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE;
swi r11, r1, PT_R1
* by STATE_SAVE_SIZE but we need to get correct R1 value */
addik r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + STATE_SAVE_SIZE;
swi r11, r1, PTO+PT_R1
/* MS: r31 - current pointer isn't changed */
tovirt(r1,r1)
#ifdef CONFIG_KGDB
addi r5, r1, 0 /* pass pt_reg address as the first arg */
addi r5, r1, PTO /* pass pt_reg address as the first arg */
addik r15, r0, dbtrap_call; /* return address */
rtbd r0, microblaze_kgdb_break
nop;
@ -1000,16 +1020,16 @@ C_ENTRY(_debug_exception):
addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
tophys(r1,r1);
addik r1, r1, -PT_SIZE; /* Make room on the stack. */
addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
SAVE_REGS;
swi r16, r1, PT_PC; /* Save LP */
swi r0, r1, PT_MODE; /* Was in user-mode. */
swi r16, r1, PTO+PT_PC; /* Save LP */
swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
swi r11, r1, PT_R1; /* Store user SP. */
swi r11, r1, PTO+PT_R1; /* Store user SP. */
lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
tovirt(r1,r1)
set_vms;
addik r5, r1, 0;
addik r5, r1, PTO;
addik r15, r0, dbtrap_call;
dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
rtbd r0, sw_exception
@ -1017,7 +1037,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
/* MS: The first instruction for the second part of the gdb/kgdb */
set_bip; /* Ints masked for state restore */
lwi r11, r1, PT_MODE;
lwi r11, r1, PTO+PT_MODE;
bnei r11, 2f;
/* MS: Return to user space - gdb */
1:
@ -1036,7 +1056,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
5: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
beqi r11, 4f; /* Signals to handle, handle them */
addik r5, r1, 0; /* Arg 1: struct pt_regs *regs */
addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
bralid r15, do_notify_resume; /* Handle any signals */
addi r6, r0, 0; /* Arg 2: int in_syscall */
bri 1b
@ -1047,7 +1067,7 @@ dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
tophys(r1,r1);
/* MS: Restore all regs */
RESTORE_REGS_RTBD
addik r1, r1, PT_SIZE /* Clean up stack space */
addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space */
lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
DBTRAP_return_user: /* MS: Make global symbol for debugging */
rtbd r16, 0; /* MS: Instructions to return from a debug trap */
@ -1058,9 +1078,9 @@ DBTRAP_return_user: /* MS: Make global symbol for debugging */
tophys(r1,r1);
/* MS: Restore all regs */
RESTORE_REGS_RTBD
lwi r14, r1, PT_R14;
lwi r16, r1, PT_PC;
addik r1, r1, PT_SIZE; /* MS: Clean up stack space */
lwi r14, r1, PTO+PT_R14;
lwi r16, r1, PTO+PT_PC;
addik r1, r1, STATE_SAVE_SIZE; /* MS: Clean up stack space */
tovirt(r1,r1);
DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
rtbd r16, 0; /* MS: Instructions to return from a debug trap */
@ -1158,7 +1178,7 @@ ENTRY(_switch_to)
.ent xmb_inject_err
.type xmb_inject_err, @function
xmb_inject_err:
addik r1, r1, -PT_SIZE
addik r1, r1, -STATE_SAVE_SIZE
SAVE_REGS
/* Switch to real mode */
@ -1182,7 +1202,7 @@ xmb_inject_err:
nop;
1:
RESTORE_REGS
addik r1, r1, PT_SIZE
addik r1, r1, STATE_SAVE_SIZE
rtsd r15, 8;
nop;
.end xmb_inject_err

5
arch/microblaze/kernel/hw_exception_handler.S
View File

@ -313,6 +313,11 @@ _MB_HW_ExceptionVectorTable:
.align 4
.ent _hw_exception_handler
_hw_exception_handler:
/*
* This handler saves into the static pt_pool_space buffer, not into a
* stack frame, so the plain PT_* offsets are right here -- do not add
* the PTO of entry.S's frames.
*/
swi r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */
/* Save date to kernel memory. Here is the problem
* when you came from user space */

5
arch/microblaze/kernel/process.c
View File

@ -19,6 +19,7 @@
#include <linux/bitops.h>
#include <linux/ptrace.h>
#include <asm/cacheflush.h>
#include <asm/entry.h>
void show_regs(struct pt_regs *regs)
{
@ -65,7 +66,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
* the registers. That's OK for a brand new thread.*/
memset(childregs, 0, sizeof(struct pt_regs));
memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
ti->cpu_context.r1 = (unsigned long)childregs;
ti->cpu_context.r1 = (unsigned long)childregs - PTO;
ti->cpu_context.r20 = (unsigned long)args->fn;
ti->cpu_context.r19 = (unsigned long)args->fn_arg;
childregs->pt_mode = 1;
@ -79,7 +80,7 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
childregs->r1 = usp;
memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
ti->cpu_context.r1 = (unsigned long)childregs;
ti->cpu_context.r1 = (unsigned long)childregs - PTO;
childregs->msr |= MSR_UMS;
/* we should consider the fact that childregs is a copy of the parent

3
arch/microblaze/kernel/ptrace.c
View File

@ -101,6 +101,9 @@ long arch_ptrace(struct task_struct *child, long request,
} else {
rval = -EIO;
}
} else if (request == PTRACE_POKEUSR &&
(addr == PT_MSR || addr == PT_MODE)) {
rval = -EIO;
} else if (addr < PT_SIZE && (addr & 0x3) == 0) {
microblaze_reg_t *reg_addr = reg_save_addr(addr, child);
if (request == PTRACE_PEEKUSR)

22
arch/microblaze/kernel/reset.c
View File

@ -28,6 +28,7 @@ void machine_halt(void)
void machine_power_off(void)
{
pr_notice("Machine power off...\n");
do_kernel_power_off();
while (1)
;
}
@ -40,3 +41,24 @@ void machine_restart(char *cmd)
pr_emerg("Reboot failed -- System halted\n");
while (1);
}
#ifdef CONFIG_MB_POWER_OFF_THROUGH_UNALIGNED_PC
static int unaligned_pc_sys_off(struct sys_off_data *data)
{
__asm__(
"bri 1\n"
);
return NOTIFY_DONE;
}
static int __init register_unaligned_pc_sys_off(void)
{
struct sys_off_handler *sys_off;
sys_off = register_sys_off_handler(SYS_OFF_MODE_POWER_OFF, SYS_OFF_PRIO_LOW,
unaligned_pc_sys_off, NULL);
return PTR_ERR_OR_ZERO(sys_off);
}
device_initcall(register_unaligned_pc_sys_off);
#endif /* CONFIG_MB_POWER_OFF_THROUGH_UNALIGNED_PC */

26
arch/microblaze/kernel/signal.c
View File

@ -33,6 +33,7 @@
#include <linux/linkage.h>
#include <linux/resume_user_mode.h>
#include <asm/entry.h>
#include <asm/registers.h>
#include <asm/ucontext.h>
#include <linux/uaccess.h>
#include <linux/syscalls.h>
@ -49,6 +50,14 @@ struct sigframe {
};
struct rt_sigframe {
/*
* Home area for the handler's register arguments: the MicroBlaze
* ABI reserves [r1+0] for the return address and lets the callee
* store r5..r10 at [r1+4]..[r1+24], and r1 points at this frame
* when the handler is entered. Without the gap those stores
* corrupt frame->info.
*/
unsigned long abi_gap[7];
struct siginfo info;
struct ucontext uc;
unsigned long tramp[2]; /* signal trampoline */
@ -73,6 +82,22 @@ static int restore_sigcontext(struct pt_regs *regs,
COPY(pc); COPY(ear); COPY(esr); COPY(fsr);
#undef COPY
/*
* The frame is user-writable, so restore only the user-writable
* status flags (carry) and keep the kernel-controlled MSR bits
* (UMS/VMS/IE/EE/...) from regs->msr: rtbd derives the resumed mode
* from UMS/VMS, so a verbatim restore would hand userspace the
* privileged return state. Same idea as x86 masking the restored
* EFLAGS to FIX_EFLAGS.
*/
{
unsigned long msr;
err |= __get_user(msr, &sc->regs.msr);
regs->msr = (regs->msr & ~(MSR_C | MSR_CC)) |
(msr & (MSR_C | MSR_CC));
}
*rval_p = regs->r3;
return err;
@ -132,6 +157,7 @@ setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
COPY(r26); COPY(r27); COPY(r28); COPY(r29);
COPY(r30); COPY(r31);
COPY(pc); COPY(ear); COPY(esr); COPY(fsr);
COPY(msr); /* restore_sigcontext() accepts only carry state */
#undef COPY
err |= __put_user(mask, &sc->oldmask);

2
arch/microblaze/kernel/syscalls/syscall.tbl
View File

@ -193,7 +193,7 @@
183 common getcwd sys_getcwd
184 common capget sys_capget
185 common capset sys_capset
186 common sigaltstack sys_ni_syscall
186 common sigaltstack sys_sigaltstack
187 common sendfile sys_sendfile
188 common getpmsg sys_ni_syscall
189 common putpmsg sys_ni_syscall

24
tools/testing/kunit/qemu_configs/microblazebe.py Normal file
View File

@ -0,0 +1,24 @@
# SPDX-License-Identifier: GPL-2.0-only
from ..qemu_config import QemuArchParams
QEMU_ARCH = QemuArchParams(linux_arch='microblaze',
kconfig='''
CONFIG_KERNEL_BASE_ADDR=0x90000000
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=0
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_SERIAL_UARTLITE=y
CONFIG_SERIAL_UARTLITE_CONSOLE=y
CONFIG_MB_POWER_OFF_THROUGH_UNALIGNED_PC=y
''',
qemu_arch='microblaze',
kernel_path='arch/microblaze/boot/linux.bin',
kernel_command_line='kunit_shutdown=poweroff',
extra_qemu_params=[
'-M', 'petalogix-s3adsp1800',
],
)

27
tools/testing/kunit/qemu_configs/microblazeel.py Normal file
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# SPDX-License-Identifier: GPL-2.0-only
from ..qemu_config import QemuArchParams
QEMU_ARCH = QemuArchParams(linux_arch='microblaze',
kconfig='''
CONFIG_KERNEL_BASE_ADDR=0x50000000
CONFIG_XILINX_MICROBLAZE0_FAMILY="virtex5"
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
CONFIG_XILINX_MICROBLAZE0_USE_FPU=1
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_16550A_VARIANTS=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_MB_POWER_OFF_THROUGH_UNALIGNED_PC=y
''',
qemu_arch='microblaze',
kernel_path='arch/microblaze/boot/linux.bin',
kernel_command_line='kunit_shutdown=poweroff',
extra_qemu_params=[
'-M', 'petalogix-ml605',
],
)